Added a register read handler for tilegen (although nothing seems to benefit from it)

This commit is contained in:
Bart Trzynadlowski 2016-05-08 20:30:45 +00:00
parent 9249eaa29f
commit a9095e6c8e
3 changed files with 27 additions and 4 deletions

View file

@ -1119,15 +1119,17 @@ UINT32 CModel3::Read32(UINT32 addr)
// Tile generator
case 0xF1:
if (addr==0xF1180000) // fixes 2D graphics (TO-DO: integrate register reads into TileGen.cpp)
return 0;
// Tile generator accesses its RAM as little endian, must flip for big endian PowerPC
if (addr < 0xF1120000)
{
data = TileGen.ReadRAM(addr&0x1FFFFF);
return FLIPENDIAN32(data);
}
else if ((addr>=0xF1180000) && (addr<0xF1180100))
{
data = TileGen.ReadRegister(addr & 0xFF);
return FLIPENDIAN32(data);
}
break;

View file

@ -365,12 +365,19 @@ void CTileGen::WritePalette(unsigned color, UINT32 data)
pal[1][color] = AddColorOffset(r, g, b, a, regs[0x44/4]); // B/B'
}
UINT32 CTileGen::ReadRegister(unsigned reg)
{
reg &= 0xFF;
return regs[reg/4];
}
void CTileGen::WriteRegister(unsigned reg, UINT32 data)
{
reg &= 0xFF;
switch (reg)
{
case 0x00:
case 0x08:
case 0x0C:
case 0x20:

View file

@ -168,11 +168,25 @@ public:
*/
void WriteRAM(unsigned addr, UINT32 data);
/*
* ReadRegister(reg):
*
* Reads 32 bits of data from a (little endian) register. If a big endian
* device is reading, the word must be flipped.
*
* Parameters:
* reg Aligned (32 bits) register offset (0x00-0xFC).
*
* Returns:
* Data read as little endian from the register.
*/
UINT32 ReadRegister(unsigned reg);
/*
* WriteRegister(reg, data):
*
* Writes 32 bits of data to a (little endian) register. If a big endian
* device is writing, th word must be flipped.
* device is writing, the word must be flipped.
*
* Parameters:
* reg Aligned (32 bits) register offset (0x00-0xFC).