mirror of
https://github.com/RetroDECK/Supermodel.git
synced 2024-11-22 13:55:38 +00:00
New JTAG patch for Sega Rally 2; linked mode now fully working.
Few other minor changes
This commit is contained in:
parent
94d8a1b22d
commit
b62110617b
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@ -1899,10 +1899,18 @@
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</hardware>
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<roms>
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<patches>
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<!-- Unemulated JTAG stuff -->
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<!-- Old patch to bypass JTAG checks, breaks linked mode -->
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<!--
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<patch region="crom" bits="32" offset="0x7c0c4" value="0x60000000" />
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<patch region="crom" bits="32" offset="0x7c0c8" value="0x60000000" />
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<patch region="crom" bits="32" offset="0x7c0cc" value="0x60000000" />
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-->
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<!-- New patch to bypass JTAG checks -->
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<patch region="crom" bits="32" offset="0x7b348" value="0x60000000" />
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<patch region="crom" bits="32" offset="0x7b568" value="0x60000000" />
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<patch region="crom" bits="32" offset="0x7b6b4" value="0x60000000" />
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<patch region="crom" bits="32" offset="0x7b7b0" value="0x60000000" />
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<patch region="crom" bits="32" offset="0x7b8a8" value="0x60000000" />
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</patches>
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<region name="crom" stride="8" chunk_size="2" byte_swap="true">
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<file offset="0" name="epr-20635.20" crc32="0x7937473F" />
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@ -1021,7 +1021,8 @@ UINT8 CModel3::Read8(UINT32 addr)
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SDL_ShowSimpleMessageBox(SDL_MESSAGEBOX_ERROR, "Info", "Out of Range", NULL);
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}
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//printf("R8 ioreg @%x=%x\n", (addr & 0x1FF), netBuffer[0x10000 + ((addr & 0x1FF) / 2)]);
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return netBuffer[0x10000 + ((addr & 0x1FF) / 2)];
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//return netBuffer[0x10000 + ((addr & 0x1FF) / 2)];
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return (UINT8)NetBoard->ReadIORegister((addr & 0x1FF) / 2);
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case 2:
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case 3:
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@ -1316,43 +1317,28 @@ UINT32 CModel3::Read32(UINT32 addr)
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switch ((addr & 0x3ffff) >> 16)
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{
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case 0:
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//printf("R32 netbuffer @%x=%x\n", (addr & 0xFFFF), FLIPENDIAN32(*(UINT32 *)&netBuffer[(addr & 0xFFFF)]));
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result = *(UINT32 *)&netBuffer[(addr & 0xFFFF)];
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result = FLIPENDIAN32(result);
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return ((result << 16) | (result >> 16));
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//return FLIPENDIAN32(result); // result
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case 1: // ioreg 32bits access to 16bits range
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//printf("R32 ioreg @%x=%x\n", (addr & 0x1FF), FLIPENDIAN32(*(UINT32 *)&netBuffer[0x10000 + ((addr & 0x1FF) / 2)]));
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if (addr > 0xc00101ff)
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{
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printf("R32 ATTENTION OUT OF RANGE\n");
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}
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UINT32 test;
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test = (*(UINT32 *)&netBuffer[0x10000 + ((addr & 0x1FF) / 2)]);
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/*if (((FLIPENDIAN32(test) & 0x00ff0000) != 0x00900000) && ((FLIPENDIAN32(test) & 0x00ff0000) != 0x00a00000) && ((FLIPENDIAN32(test) & 0x00ff0000) != 0x00b00000) && ((FLIPENDIAN32(test) & 0x00ff0000) != 0x00800000) && ((FLIPENDIAN32(test) & 0x00ff0000) != 0x00f00000))
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{
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printf("R32 ioreg @%x=%04x\n", (addr), FLIPENDIAN32(test) >> 16);
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}*/
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result = (*(UINT32 *)&netBuffer[0x10000 + ((addr & 0x1FF) / 2)]) & 0x0000ffff;
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result = NetBoard->ReadIORegister((addr & 0x1FF) / 2);
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return FLIPENDIAN32(result);
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case 2:
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case 3:
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//printf("R32 netram @%x=%x\n", (addr & 0x1FFFF), FLIPENDIAN32(*(UINT32 *)&netBuffer[(addr & 0x1FFFF)]));
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if (addr > 0xc002ffff)
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if (addr > 0xc003ffff)
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{
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printf("R32 ATTENTION OUT OF RANGE\n");
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}
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result = (*(UINT32 *)&netRAM[((addr & 0x1FFFF) / 2)]) & 0x0000ffff;
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return FLIPENDIAN32(result); // result
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/*case 3:
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//printf("R32 netram @%x=%x\n", (addr & 0x1FFFF), FLIPENDIAN32(*(UINT32 *)&netBuffer[(addr & 0x1FFFF)]));
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result = (*(UINT32 *)&netRAM[((addr & 0x1FFFF) / 2)]) & 0x0000ffff;
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return FLIPENDIAN32(result); // result*/
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default:
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printf("R32 ATTENTION OUT OF RANGE\n");
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@ -1493,7 +1479,6 @@ void CModel3::Write8(UINT32 addr, UINT8 data)
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switch ((addr & 0x3ffff) >> 16)
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{
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case 0:
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//printf("W8 netbuffer @%x<-%x\n", (addr & 0xFFFF), data);
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*(UINT8 *)&netBuffer[(addr & 0xFFFF) ^ 2] = data;
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break;
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@ -1503,10 +1488,7 @@ void CModel3::Write8(UINT32 addr, UINT8 data)
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printf("W8 ATTENTION OUT OF RANGE\n");
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}
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//printf("W8 ioreg @%x<-%x\n", (addr & 0x1FF), data);
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if (((addr & 0x1FF) == 0x180) && (data == 0x00))
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NetBoard->Reset();
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*(UINT8 *)&netBuffer[0x10000 + ((addr & 0x1FF) / 2)] = data;
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NetBoard->WriteIORegister((addr & 0x1FF) / 2, data);
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break;
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case 2:
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@ -1516,13 +1498,8 @@ void CModel3::Write8(UINT32 addr, UINT8 data)
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printf("W8 ATTENTION OUT OF RANGE\n");
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}
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//printf("W8 netram @%x<-%x\n", (addr & 0x1FFFF), data);
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*(UINT8 *)&netRAM[(addr & 0x1FFFF)/2] = data;
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break;
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/*case 3:
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//printf("W8 netram @%x<-%x\n", (addr & 0x1FFFF), data);
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*(UINT8 *)&netRAM[(addr & 0x1FFFF) / 2] = data;
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break;*/
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default:
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printf("W8 ATTENTION OUT OF RANGE\n");
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@ -1623,7 +1600,6 @@ void CModel3::Write16(UINT32 addr, UINT16 data)
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switch ((addr & 0x3ffff) >> 16)
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{
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case 0:
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//printf("W16 netbuffer @%x<-%x\n", (addr & 0xFFFF), data);
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*(UINT16 *)&netBuffer[(addr & 0xFFFF) ^ 2] = FLIPENDIAN16(data);
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break;
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@ -1829,8 +1805,6 @@ void CModel3::Write32(UINT32 addr, UINT32 data)
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switch ((addr & 0x3ffff) >> 16)
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{
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case 0:
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//printf("W32 netbuffer @%x<-%x\n", (addr & 0xFFFF), data);
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//*(UINT32 *)&netBuffer[(addr & 0xFFFF)] = FLIPENDIAN32(data);
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temp = FLIPENDIAN32(data);
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*(UINT32 *)&netBuffer[(addr & 0xFFFF)] = (temp << 16) | (temp >> 16);
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break;
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@ -1841,26 +1815,19 @@ void CModel3::Write32(UINT32 addr, UINT32 data)
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printf("W32 ATTENTION OUT OF RANGE\n");
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}
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//printf("W32 ioreg @%x<-%04x\n", (addr /*& 0x1FF*/), data>>16);
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if (((addr & 0x1FF) == 0x180) && ((data >> 16) == 0x0000))
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NetBoard->Reset();
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*(UINT16 *)&netBuffer[0x10000 + ((addr & 0x1FF) / 2)] = FLIPENDIAN16(data >> 16);
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NetBoard->WriteIORegister((addr & 0x1FF) / 2, FLIPENDIAN16(data >> 16));
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break;
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case 2:
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case 3:
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if (addr > 0xc002ffff)
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if (addr > 0xc003ffff)
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{
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printf("W32 ATTENTION OUT OF RANGE\n");
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}
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//printf("W32 netram @%x<-%x\n", (addr & 0x1FFFF), data);
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*(UINT16 *)&netRAM[((addr & 0x1FFFF) / 2)] = FLIPENDIAN16(data >> 16);
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break;
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/*case 3:
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//printf("W32 netram @%x<-%x\n", (addr & 0x1FFFF), data);
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*(UINT16 *)&netRAM[((addr & 0x1FFFF) / 2)] = FLIPENDIAN16(data >> 16);
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break;*/
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default:
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printf("W32 ATTENTION OUT OF RANGE\n");
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break;
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@ -3153,7 +3120,7 @@ const static int DSBPROGROM_SIZE = 0x20000; //128KB
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const static int DSBMPEGROM_SIZE = 0x1000000; //16MB
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const static int DRIVEROM_SIZE = 0x10000; //64KB
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const static int NETBUFFER_SIZE = 0x20000; //128KB
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const static int NETRAM_SIZE = 0x20000; //128KB
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const static int NETRAM_SIZE = 0x10000; //64KB
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const static int MEM_POOL_SIZE = RAM_SIZE + CROM_SIZE +
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CROMxx_SIZE + VROM_SIZE +
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@ -251,8 +251,8 @@ private:
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UINT8 *backupRAM; // 128 KB Backup RAM (battery backed)
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UINT8 *securityRAM; // 128 KB Security Board RAM
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UINT8 *driveROM; // 32 KB drive board ROM (Z80 program) (optional)
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UINT8 *netRAM; // 128KB RAM
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UINT8 *netBuffer; // 128KB buffer
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UINT8 *netRAM; // 64 KB RAM
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UINT8 *netBuffer; // 128 KB buffer
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// Banked CROM
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UINT8 *cromBank; // currently mapped in CROM bank
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@ -42,6 +42,9 @@ public:
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virtual bool Init(UINT8* netRAMPtr, UINT8* netBufferPtr) = 0;
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virtual void GetGame(Game) = 0;
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virtual UINT16 ReadIORegister(unsigned reg) = 0;
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virtual void WriteIORegister(unsigned reg, UINT16 data) = 0;
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};
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#endif
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@ -64,7 +64,7 @@
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// Network=1
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// PortIn = 1970
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// PortOut = 1971
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// addr_out = "127.0.0.1"
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// AddressOut = "127.0.0.1"
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//
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// add for slave
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// Network=1
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// Network=1
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// PortIn = 1970
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// PortOut = 1971
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// addr_out = "127.0.0.1"
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// AddressOut = "127.0.0.1"
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//
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// add for slave1
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// Network=1
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// PortIn = 1971
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// PortOut = 1972
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// addr_out = "127.0.0.1"
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// AddressOut = "127.0.0.1"
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//
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// add for slave2
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// Network=1
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// PortIn = 1972
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// PortOut = 1970
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// addr_out = "127.0.0.1"
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// AddressOut = "127.0.0.1"
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//#define NET_DEBUG
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bool CNetBoard::IsRunning(void)
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{
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return m_attached && ((ioreg[0xc0] == 0xff) || (ioreg[0xc0] == 0x01));
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return m_attached && (ioreg[0xc0] != 0);
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}
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void CNetBoard::GetGame(Game gameinfo)
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Gameinfo = gameinfo;
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}
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UINT16 CNetBoard::ReadIORegister(unsigned reg)
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{
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if (!IsRunning())
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return 0;
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return *(UINT16*)&ioreg[reg];
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}
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void CNetBoard::WriteIORegister(unsigned reg, UINT16 data)
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{
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if (reg == 0xc0 && !(data != 0 && IsRunning()))
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Reset(); // don't reset if we are activating the netboard but it is already activated
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*(UINT16*)&ioreg[reg] = data;
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}
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@ -56,12 +56,14 @@ public:
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M68KCtx *GetM68K(void);
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bool IsAttached(void);
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bool IsRunning(void);
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bool CodeReady;
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bool Init(UINT8 *netRAMPtr, UINT8 *netBufferPtr);
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void GetGame(Game);
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UINT16 ReadIORegister(unsigned reg);
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void WriteIORegister(unsigned reg, UINT16 data);
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CNetBoard(const Util::Config::Node &config);
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~CNetBoard(void);
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@ -72,7 +74,7 @@ private:
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M68KCtx M68K;
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// Sound board memory
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UINT8 *netRAM; // 128Kb RAM (passed in from parent object)
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UINT8 *netRAM; // 64Kb RAM (passed in from parent object)
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UINT8 *netBuffer; // 128kb (passed in from parent object)
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UINT8 *memoryPool; // single allocated region for all net board RAM
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UINT8 *CommRAM;
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@ -28,7 +28,6 @@
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// these make 16-bit read/writes much neater
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#define RAM16 *(uint16_t*)&RAM
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#define CommRAM16 *(uint16_t*)&CommRAM
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#define ioreg16 *(uint16_t*)&ioreg
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static const uint64_t netGUID = 0x5bf177da34872;
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@ -39,12 +38,11 @@ inline bool CSimNetBoard::IsGame(const char* gameName)
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CSimNetBoard::CSimNetBoard(const Util::Config::Node& config) : m_config(config)
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{
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m_running = true;
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}
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CSimNetBoard::~CSimNetBoard(void)
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{
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m_running = false;
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m_quit = true;
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if (m_connectThread.joinable())
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m_connectThread.join();
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@ -64,7 +62,6 @@ bool CSimNetBoard::Init(uint8_t* netRAMPtr, uint8_t* netBufferPtr)
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{
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RAM = netRAMPtr;
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CommRAM = netBufferPtr;
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ioreg = netBufferPtr + 0x10000;
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m_attached = m_gameInfo.netboard_present && m_config["Network"].ValueAs<bool>();
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@ -102,8 +99,8 @@ void CSimNetBoard::RunFrame(void)
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case State::start:
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if (!m_connected && !m_connectThread.joinable())
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m_connectThread = std::thread(&CSimNetBoard::ConnectProc, this);
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ioreg16[0x88] = 0;
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ioreg16[0x8a] = IsGame("dirtdvls") ? 0x4004 : 0xe000;
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m_status0 = 0;
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m_status1 = IsGame("dirtdvls") ? 0x4004 : 0xe000;
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m_state = State::init;
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break;
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@ -111,23 +108,23 @@ void CSimNetBoard::RunFrame(void)
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memset(CommRAM, 0, 0x10000);
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if (m_gameType == GameType::one)
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{
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if (ioreg16[0x88] & 0x8000) // has main board changed this register?
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if (m_status0 & 0x8000) // has main board changed this register?
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{
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ioreg[0] |= 0x01; // simulate IRQ 2 ack
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if (ioreg16[0x88] == 0xf000)
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m_IRQ2ack |= 0x01; // simulate IRQ 2 ack
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if (m_status0 == 0xf000)
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{
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// initialization complete
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ioreg16[0x8a] = 0;
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m_status1 = 0;
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CommRAM16[0x72] = FLIPENDIAN16(0x1); // is this necessary?
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m_state = State::testing;
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}
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ioreg16[0x88] = 0; // 0 should work for all init subroutines
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m_status0 = 0; // 0 should work for all init subroutines
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}
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}
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else
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{
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// type 2 performs initialization on its own
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ioreg16[0x8a] = 0;
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m_status1 = 0;
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m_state = State::testing;
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m_counter = 0;
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}
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@ -136,7 +133,7 @@ void CSimNetBoard::RunFrame(void)
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case State::testing:
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if (m_gameType == GameType::one)
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{
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ioreg16[0x88] += 1; // type 1 games require this to be incremented every frame
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m_status0 += 1; // type 1 games require this to be incremented every frame
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if (!m_connected)
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break;
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@ -240,8 +237,8 @@ void CSimNetBoard::RunFrame(void)
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m_numMachines = numMachines + 1;
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ioreg16[0x88] = 0; // supposed to cycle between 0 and 1 (also 2 for Daytona 2); doesn't seem to matter
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ioreg16[0x8a] = 0x2021 + (numMachines * 0x20) + machineIndex;
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m_status0 = 0; // supposed to cycle between 0 and 1 (also 2 for Daytona 2); doesn't seem to matter
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m_status1 = 0x2021 + (numMachines * 0x20) + machineIndex;
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CommRAM16[0x0] = RAM16[0x400]; // 0 if master, 1 if slave
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CommRAM16[0x2] = numMachines;
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@ -421,18 +418,18 @@ void CSimNetBoard::RunFrame(void)
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{
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ErrorLog("no slave machines detected. Make sure only one machine is set to master!");
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if (IsGame("dirtdvls"))
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ioreg16[0x8a] = 0x8085; // seems like the netboard code writers really liked their CPU model numbers
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m_status1 = 0x8085; // seems like the netboard code writers really liked their CPU model numbers
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m_state = State::error;
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break;
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}
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m_numMachines = numMachines.total + 1;
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ioreg16[0x88] = 5; // probably not necessary
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m_status0 = 5; // probably not necessary
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if (IsGame("dirtdvls"))
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ioreg16[0x8a] = (numMachines.playable << 4) | machineIndex.playable | 0x7400;
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m_status1 = (numMachines.playable << 4) | machineIndex.playable | 0x7400;
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else
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ioreg16[0x8a] = (numMachines.playable << 8) | machineIndex.playable;
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m_status1 = (numMachines.playable << 8) | machineIndex.playable;
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CommRAM16[0x0] = RAM16[0x200]; // master/slave/relay status
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CommRAM16[0x2] = (numMachines.playable << 8) | numMachines.total;
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@ -466,7 +463,7 @@ void CSimNetBoard::RunFrame(void)
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// link broken - send an "empty" packet to alert other machines
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nets->Send(nullptr, 0);
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m_state = State::error;
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ioreg16[0x8a] = 0x40; // send "link broken" message to mainboard
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||||
m_status1 = 0x40; // send "link broken" message to mainboard
|
||||
break;
|
||||
}
|
||||
memcpy(CommRAM + 0x100 + m_segmentSize, recv_data.data(), recv_data.size());
|
||||
|
@ -485,7 +482,7 @@ void CSimNetBoard::RunFrame(void)
|
|||
nets->Send(nullptr, 0);
|
||||
m_state = State::error;
|
||||
if (m_gameType == GameType::one)
|
||||
ioreg16[0x8a] = 0x40; // send "link broken" message to mainboard
|
||||
m_status1 = 0x40; // send "link broken" message to mainboard
|
||||
break;
|
||||
}
|
||||
memcpy(CommRAM + 0x100 + (i + 1) * m_segmentSize, recv_data.data(), recv_data.size());
|
||||
|
@ -509,7 +506,7 @@ void CSimNetBoard::Reset(void)
|
|||
netr->Receive();
|
||||
}
|
||||
|
||||
ioreg[0xc0] = 0;
|
||||
m_running = false;
|
||||
m_state = State::start;
|
||||
}
|
||||
|
||||
|
@ -520,7 +517,7 @@ bool CSimNetBoard::IsAttached(void)
|
|||
|
||||
bool CSimNetBoard::IsRunning(void)
|
||||
{
|
||||
return (ioreg[0xc0] == 0xff) || (ioreg[0xc0] == 0x01); // there's probably a better way of checking
|
||||
return m_attached && m_running;
|
||||
}
|
||||
|
||||
void CSimNetBoard::GetGame(Game gameInfo)
|
||||
|
@ -540,14 +537,14 @@ void CSimNetBoard::ConnectProc(void)
|
|||
// wait until TCPSend has connected to the next machine
|
||||
while (!nets->Connect())
|
||||
{
|
||||
if (!m_running)
|
||||
if (m_quit)
|
||||
return;
|
||||
}
|
||||
|
||||
// wait until TCPReceive has accepted a connection from the previous machine
|
||||
while (!netr->Connected())
|
||||
{
|
||||
if (!m_running)
|
||||
if (m_quit)
|
||||
return;
|
||||
std::this_thread::sleep_for(1ms);
|
||||
}
|
||||
|
@ -556,3 +553,45 @@ void CSimNetBoard::ConnectProc(void)
|
|||
|
||||
m_connected = true;
|
||||
}
|
||||
|
||||
uint16_t CSimNetBoard::ReadIORegister(unsigned reg)
|
||||
{
|
||||
if (!IsRunning())
|
||||
return 0;
|
||||
|
||||
switch (reg)
|
||||
{
|
||||
case 0x00:
|
||||
return m_IRQ2ack;
|
||||
case 0x88:
|
||||
return m_status0;
|
||||
case 0x8a:
|
||||
return m_status1;
|
||||
default:
|
||||
ErrorLog("read from unknown IO register 0x%02x", reg);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
void CSimNetBoard::WriteIORegister(unsigned reg, uint16_t data)
|
||||
{
|
||||
switch (reg)
|
||||
{
|
||||
case 0x00:
|
||||
m_IRQ2ack = data;
|
||||
break;
|
||||
case 0x88:
|
||||
m_status0 = data;
|
||||
break;
|
||||
case 0x8a:
|
||||
m_status1 = data;
|
||||
break;
|
||||
case 0xc0:
|
||||
if (data == 0)
|
||||
Reset();
|
||||
m_running = (data != 0);
|
||||
break;
|
||||
default:
|
||||
ErrorLog("write to unknown IO register 0x%02x", reg);
|
||||
}
|
||||
}
|
|
@ -62,20 +62,22 @@ public:
|
|||
|
||||
void GetGame(Game gameInfo);
|
||||
|
||||
uint16_t ReadIORegister(unsigned reg);
|
||||
void WriteIORegister(unsigned reg, uint16_t data);
|
||||
|
||||
private:
|
||||
// Config
|
||||
const Util::Config::Node& m_config;
|
||||
|
||||
uint8_t* RAM = nullptr;
|
||||
uint8_t* CommRAM = nullptr;
|
||||
uint8_t* ioreg = nullptr;
|
||||
|
||||
// netsock
|
||||
uint16_t port_in = 0;
|
||||
uint16_t port_out = 0;
|
||||
std::string addr_out = "";
|
||||
std::thread m_connectThread;
|
||||
std::atomic_bool m_running = false;
|
||||
std::atomic_bool m_quit = false;
|
||||
std::atomic_bool m_connected = false;
|
||||
|
||||
std::unique_ptr<TCPSend> nets = nullptr;
|
||||
|
@ -91,6 +93,11 @@ private:
|
|||
uint16_t m_segmentSize = 0;
|
||||
|
||||
bool m_attached = false;
|
||||
bool m_running = false;
|
||||
|
||||
uint16_t m_IRQ2ack = 0;
|
||||
uint16_t m_status0 = 0; // ioreg 0x88
|
||||
uint16_t m_status1 = 0; // ioreg 0x8a
|
||||
|
||||
inline bool IsGame(const char* gameName);
|
||||
void ConnectProc(void);
|
||||
|
|
Loading…
Reference in a new issue