mirror of
https://github.com/RetroDECK/Supermodel.git
synced 2024-11-22 05:45:38 +00:00
Fixed 68K save state problem: pending interrupts were not being saved, sometimes causing the DSB2 to take an invalid interrupt (from the sound board 68K) after loading a save state. Save states are no longer compatible with previous revision.
This commit is contained in:
Bart Trzynadlowski
parent
cf73207c98
commit
e6f19c40ef
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@ -217,19 +217,19 @@ $(OBJ_DIR)/m68kmake.exe: Src/CPU/68K/Musashi/m68kmake.c
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$(OBJ_DIR)/m68kops.h: $(OBJ_DIR)/m68kmake.exe Src/CPU/68K/Musashi/m68k_in.c
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$(OBJ_DIR)/m68kmake.exe $(OBJ_DIR) Src/CPU/68K/Musashi/m68k_in.c
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$(OBJ_DIR)/m68kcpu.obj: Src/CPU/68K/Musashi/m68kcpu.c $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h
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$(OBJ_DIR)/m68kcpu.obj: Src/CPU/68K/Musashi/m68kcpu.c $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h Src/CPU/68K/Musashi/m68kctx.h
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$(CC) $< $(CFLAGS) /Fo$(OBJ_DIR)/m68kcpu.obj /I "$(OBJ_DIR)" /I "Src\CPU\68K\Musashi" /DINLINE="static __inline"
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$(OBJ_DIR)/m68kops.obj: $(OBJ_DIR)/m68kops.c $(OBJ_DIR)/m68kmake.exe $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h
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$(OBJ_DIR)/m68kops.obj: $(OBJ_DIR)/m68kops.c $(OBJ_DIR)/m68kmake.exe $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h Src/CPU/68K/Musashi/m68kctx.h
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$(CC) $< $(CFLAGS) /Fo$(OBJ_DIR)/m68kops.obj /I "Src\CPU\68K\Musashi" /DINLINE="static __inline"
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$(OBJ_DIR)/m68kopac.obj: $(OBJ_DIR)/m68kopac.c $(OBJ_DIR)/m68kmake.exe $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h
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$(OBJ_DIR)/m68kopac.obj: $(OBJ_DIR)/m68kopac.c $(OBJ_DIR)/m68kmake.exe $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h Src/CPU/68K/Musashi/m68kctx.h
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$(CC) $< $(CFLAGS) /Fo$(OBJ_DIR)/m68kopac.obj /I "Src\CPU\68K\Musashi" /DINLINE="static __inline"
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$(OBJ_DIR)/m68kopdm.obj: $(OBJ_DIR)/m68kopdm.c $(OBJ_DIR)/m68kmake.exe $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h
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$(OBJ_DIR)/m68kopdm.obj: $(OBJ_DIR)/m68kopdm.c $(OBJ_DIR)/m68kmake.exe $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h Src/CPU/68K/Musashi/m68kctx.h
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$(CC) $< $(CFLAGS) /Fo$(OBJ_DIR)/m68kopdm.obj /I "Src\CPU\68K\Musashi" /DINLINE="static __inline"
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$(OBJ_DIR)/m68kopnz.obj: $(OBJ_DIR)/m68kopnz.c $(OBJ_DIR)/m68kmake.exe $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h
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$(OBJ_DIR)/m68kopnz.obj: $(OBJ_DIR)/m68kopnz.c $(OBJ_DIR)/m68kmake.exe $(OBJ_DIR)/m68kops.h Src/CPU/68K/Musashi/m68k.h Src/CPU/68K/Musashi/m68kconf.h Src/CPU/68K/Musashi/m68kctx.h
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$(CC) $< $(CFLAGS) /Fo$(OBJ_DIR)/m68kopnz.obj /I "Src\CPU\68K\Musashi" /DINLINE="static __inline"
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@ -108,49 +108,54 @@ void M68KSaveState(CBlockFile *StateFile, const char *name)
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StateFile->NewBlock(name, __FILE__);
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/*
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* Rather than writing the context directly to the save state, each
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* register is copied into an array first to ensure the same result across
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* different compilers (in case the struct is ordered differently). This
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* also prevents us from inadvertently modifying the callback pointers.
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* Rather than writing the context directly, the get/set register
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* functions are used, ensuring that all context members are packed/
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* unpacked correctly.
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*
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* Note: Some of these are undoubtedly 68010 or 68020 registers and not
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* really necessary. But if the layout is changed now, the save state
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* version has to be changed, so don't do it!
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*/
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UINT32 data[31];
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UINT32 data[34];
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m68ki_cpu_core Ctx;
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data[0] = m68k_get_reg(NULL, M68K_REG_D0);
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data[1] = m68k_get_reg(NULL, M68K_REG_D1);
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data[2] = m68k_get_reg(NULL, M68K_REG_D2);
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data[3] = m68k_get_reg(NULL, M68K_REG_D3);
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data[4] = m68k_get_reg(NULL, M68K_REG_D4);
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data[5] = m68k_get_reg(NULL, M68K_REG_D5);
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data[6] = m68k_get_reg(NULL, M68K_REG_D6);
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data[7] = m68k_get_reg(NULL, M68K_REG_D7);
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data[8] = m68k_get_reg(NULL, M68K_REG_A0);
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data[9] = m68k_get_reg(NULL, M68K_REG_A1);
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data[10] = m68k_get_reg(NULL, M68K_REG_A2);
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data[11] = m68k_get_reg(NULL, M68K_REG_A3);
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data[12] = m68k_get_reg(NULL, M68K_REG_A4);
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data[13] = m68k_get_reg(NULL, M68K_REG_A5);
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data[14] = m68k_get_reg(NULL, M68K_REG_A6);
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data[15] = m68k_get_reg(NULL, M68K_REG_A7);
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data[16] = m68k_get_reg(NULL, M68K_REG_PC);
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data[17] = m68k_get_reg(NULL, M68K_REG_SR);
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data[18] = m68k_get_reg(NULL, M68K_REG_SP);
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data[19] = m68k_get_reg(NULL, M68K_REG_USP);
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data[20] = m68k_get_reg(NULL, M68K_REG_ISP);
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data[21] = m68k_get_reg(NULL, M68K_REG_MSP);
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data[22] = m68k_get_reg(NULL, M68K_REG_SFC);
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data[23] = m68k_get_reg(NULL, M68K_REG_DFC);
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data[24] = m68k_get_reg(NULL, M68K_REG_VBR);
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data[25] = m68k_get_reg(NULL, M68K_REG_CACR);
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data[26] = m68k_get_reg(NULL, M68K_REG_CAAR);
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data[27] = m68k_get_reg(NULL, M68K_REG_PREF_ADDR);
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data[28] = m68k_get_reg(NULL, M68K_REG_PREF_DATA);
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data[29] = m68k_get_reg(NULL, M68K_REG_PPC);
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data[30] = m68k_get_reg(NULL, M68K_REG_IR);
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m68k_get_context(&Ctx);
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data[0] = Ctx.int_level;
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data[1] = Ctx.int_cycles;
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data[2] = Ctx.stopped;
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data[3] = m68k_get_reg(NULL, M68K_REG_D0);
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data[4] = m68k_get_reg(NULL, M68K_REG_D1);
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data[5] = m68k_get_reg(NULL, M68K_REG_D2);
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data[6] = m68k_get_reg(NULL, M68K_REG_D3);
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data[7] = m68k_get_reg(NULL, M68K_REG_D4);
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data[8] = m68k_get_reg(NULL, M68K_REG_D5);
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data[9] = m68k_get_reg(NULL, M68K_REG_D6);
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data[10] = m68k_get_reg(NULL, M68K_REG_D7);
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data[11] = m68k_get_reg(NULL, M68K_REG_A0);
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data[12] = m68k_get_reg(NULL, M68K_REG_A1);
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data[13] = m68k_get_reg(NULL, M68K_REG_A2);
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data[14] = m68k_get_reg(NULL, M68K_REG_A3);
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data[15] = m68k_get_reg(NULL, M68K_REG_A4);
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data[16] = m68k_get_reg(NULL, M68K_REG_A5);
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data[17] = m68k_get_reg(NULL, M68K_REG_A6);
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data[18] = m68k_get_reg(NULL, M68K_REG_A7);
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data[19] = m68k_get_reg(NULL, M68K_REG_PC);
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data[20] = m68k_get_reg(NULL, M68K_REG_SR);
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data[21] = m68k_get_reg(NULL, M68K_REG_SP);
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data[22] = m68k_get_reg(NULL, M68K_REG_USP);
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data[23] = m68k_get_reg(NULL, M68K_REG_ISP);
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data[24] = m68k_get_reg(NULL, M68K_REG_MSP);
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data[25] = m68k_get_reg(NULL, M68K_REG_SFC);
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data[26] = m68k_get_reg(NULL, M68K_REG_DFC);
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data[27] = m68k_get_reg(NULL, M68K_REG_VBR);
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data[28] = m68k_get_reg(NULL, M68K_REG_CACR);
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data[29] = m68k_get_reg(NULL, M68K_REG_CAAR);
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data[30] = m68k_get_reg(NULL, M68K_REG_PREF_ADDR);
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data[31] = m68k_get_reg(NULL, M68K_REG_PREF_DATA);
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data[32] = m68k_get_reg(NULL, M68K_REG_PPC);
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data[33] = m68k_get_reg(NULL, M68K_REG_IR);
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StateFile->Write(data, sizeof(data));
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}
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@ -163,40 +168,48 @@ void M68KLoadState(CBlockFile *StateFile, const char *name)
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return;
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}
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UINT32 data[31];
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UINT32 data[34];
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m68ki_cpu_core Ctx;
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StateFile->Read(data, sizeof(data));
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m68k_set_reg(M68K_REG_D0, data[0]);
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m68k_set_reg(M68K_REG_D1, data[1]);
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m68k_set_reg(M68K_REG_D2, data[2]);
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m68k_set_reg(M68K_REG_D3, data[3]);
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m68k_set_reg(M68K_REG_D4, data[4]);
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m68k_set_reg(M68K_REG_D5, data[5]);
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m68k_set_reg(M68K_REG_D6, data[6]);
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m68k_set_reg(M68K_REG_D7, data[7]);
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m68k_set_reg(M68K_REG_A0, data[8]);
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m68k_set_reg(M68K_REG_A1, data[9]);
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m68k_set_reg(M68K_REG_A2, data[10]);
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m68k_set_reg(M68K_REG_A3, data[11]);
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m68k_set_reg(M68K_REG_A4, data[12]);
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m68k_set_reg(M68K_REG_A5, data[13]);
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m68k_set_reg(M68K_REG_A6, data[14]);
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m68k_set_reg(M68K_REG_A7, data[15]);
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m68k_set_reg(M68K_REG_PC, data[16]);
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m68k_set_reg(M68K_REG_SR, data[17]);
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m68k_set_reg(M68K_REG_SP, data[18]);
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m68k_set_reg(M68K_REG_USP, data[19]);
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m68k_set_reg(M68K_REG_ISP, data[20]);
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m68k_set_reg(M68K_REG_MSP, data[21]);
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m68k_set_reg(M68K_REG_SFC, data[22]);
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m68k_set_reg(M68K_REG_DFC, data[23]);
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m68k_set_reg(M68K_REG_VBR, data[24]);
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m68k_set_reg(M68K_REG_CACR, data[25]);
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m68k_set_reg(M68K_REG_CAAR, data[26]);
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m68k_set_reg(M68K_REG_PREF_ADDR, data[27]);
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m68k_set_reg(M68K_REG_PREF_DATA, data[28]);
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m68k_set_reg(M68K_REG_PPC, data[29]);
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m68k_set_reg(M68K_REG_IR, data[30]);
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// These must be set first, to ensure another contexts' IRQs aren't active when PC is changed
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m68k_get_context(&Ctx);
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Ctx.int_level = data[0];
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Ctx.int_cycles = data[1];
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Ctx.stopped = data[2];
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m68k_set_context(&Ctx); // write them back to context
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m68k_set_reg(M68K_REG_D0, data[3]);
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m68k_set_reg(M68K_REG_D1, data[4]);
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m68k_set_reg(M68K_REG_D2, data[5]);
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m68k_set_reg(M68K_REG_D3, data[6]);
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m68k_set_reg(M68K_REG_D4, data[7]);
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m68k_set_reg(M68K_REG_D5, data[8]);
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m68k_set_reg(M68K_REG_D6, data[9]);
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m68k_set_reg(M68K_REG_D7, data[10]);
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m68k_set_reg(M68K_REG_A0, data[11]);
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m68k_set_reg(M68K_REG_A1, data[12]);
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m68k_set_reg(M68K_REG_A2, data[13]);
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m68k_set_reg(M68K_REG_A3, data[14]);
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m68k_set_reg(M68K_REG_A4, data[15]);
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m68k_set_reg(M68K_REG_A5, data[16]);
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m68k_set_reg(M68K_REG_A6, data[17]);
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m68k_set_reg(M68K_REG_A7, data[18]);
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m68k_set_reg(M68K_REG_PC, data[19]);
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m68k_set_reg(M68K_REG_SR, data[20]);
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m68k_set_reg(M68K_REG_SP, data[21]);
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m68k_set_reg(M68K_REG_USP, data[22]);
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m68k_set_reg(M68K_REG_ISP, data[23]);
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m68k_set_reg(M68K_REG_MSP, data[24]);
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m68k_set_reg(M68K_REG_SFC, data[25]);
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m68k_set_reg(M68K_REG_DFC, data[26]);
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m68k_set_reg(M68K_REG_VBR, data[27]);
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m68k_set_reg(M68K_REG_CACR, data[28]);
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m68k_set_reg(M68K_REG_CAAR, data[29]);
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m68k_set_reg(M68K_REG_PREF_ADDR, data[30]);
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m68k_set_reg(M68K_REG_PREF_DATA, data[31]);
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m68k_set_reg(M68K_REG_PPC, data[32]);
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m68k_set_reg(M68K_REG_IR, data[33]);
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}
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// Emulation functions
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@ -236,14 +249,14 @@ void M68KGetContext(M68KCtx *Dest)
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{
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Dest->IRQAck = IRQAck;
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Dest->Bus = Bus;
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m68k_get_context(Dest->musashiCtx);
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m68k_get_context(&(Dest->musashiCtx));
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}
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void M68KSetContext(M68KCtx *Src)
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{
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IRQAck = Src->IRQAck;
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Bus = Src->Bus;
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m68k_set_context(Src->musashiCtx);
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m68k_set_context(&(Src->musashiCtx));
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}
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// One-time initialization
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@ -35,6 +35,7 @@
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#include <cstring>
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#include "Types.h"
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#include "Musashi/m68k.h"
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#include "Musashi/m68kctx.h"
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#include "CPU/Bus.h"
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// This doesn't work for now (needs to be added to the prototypes in m68k.h for m68k_read_memory*)
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@ -67,23 +68,21 @@
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typedef struct SM68KCtx
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{
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public:
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m68ki_cpu_core musashiCtx; // CPU context
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CBus *Bus; // memory handlers
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int (*IRQAck)(int); // IRQ acknowledge callback
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unsigned char *musashiCtx; // holds CPU state
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SM68KCtx(void)
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{
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Bus = NULL;
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IRQAck = NULL;
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musashiCtx = new unsigned char[m68k_context_size()];
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memset(musashiCtx, 0, m68k_context_size()); // very important! garbage in context at reset can cause very strange bugs
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memset(&musashiCtx, 0, sizeof(musashiCtx)); // very important! garbage in context at reset can cause very strange bugs
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}
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~SM68KCtx(void)
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{
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Bus = NULL;
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IRQAck = NULL;
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delete [] musashiCtx;
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}
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} M68KCtx;
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@ -836,63 +836,7 @@
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/* =============================== PROTOTYPES ============================= */
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/* ======================================================================== */
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typedef struct
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{
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uint cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, or 68020 */
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uint dar[16]; /* Data and Address Registers */
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uint ppc; /* Previous program counter */
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uint pc; /* Program Counter */
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uint sp[7]; /* User, Interrupt, and Master Stack Pointers */
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uint vbr; /* Vector Base Register (m68010+) */
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uint sfc; /* Source Function Code Register (m68010+) */
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uint dfc; /* Destination Function Code Register (m68010+) */
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uint cacr; /* Cache Control Register (m68020, unemulated) */
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uint caar; /* Cache Address Register (m68020, unemulated) */
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uint ir; /* Instruction Register */
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uint t1_flag; /* Trace 1 */
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uint t0_flag; /* Trace 0 */
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uint s_flag; /* Supervisor */
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uint m_flag; /* Master/Interrupt state */
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uint x_flag; /* Extend */
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uint n_flag; /* Negative */
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uint not_z_flag; /* Zero, inverted for speedups */
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uint v_flag; /* Overflow */
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uint c_flag; /* Carry */
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uint int_mask; /* I0-I2 */
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uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
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uint int_cycles; /* ASG: extra cycles from generated interrupts */
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uint stopped; /* Stopped state */
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uint pref_addr; /* Last prefetch address */
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uint pref_data; /* Data in the prefetch queue */
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uint address_mask; /* Available address pins */
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uint sr_mask; /* Implemented status register bits */
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uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
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uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
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/* Clocks required for instructions / exceptions */
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uint cyc_bcc_notake_b;
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uint cyc_bcc_notake_w;
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uint cyc_dbcc_f_noexp;
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uint cyc_dbcc_f_exp;
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uint cyc_scc_r_true;
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uint cyc_movem_w;
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uint cyc_movem_l;
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uint cyc_shift;
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uint cyc_reset;
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uint8* cyc_instruction;
|
||||
uint8* cyc_exception;
|
||||
|
||||
/* Callbacks to host */
|
||||
int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
|
||||
void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
|
||||
void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
|
||||
void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
|
||||
void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
|
||||
void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
|
||||
void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
|
||||
void (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */
|
||||
|
||||
} m68ki_cpu_core;
|
||||
#include "m68kctx.h"
|
||||
|
||||
|
||||
extern m68ki_cpu_core m68ki_cpu;
|
||||
|
|
@ -2010,7 +1954,9 @@ void m68ki_exception_interrupt(uint int_level)
|
|||
INLINE void m68ki_check_interrupts(void)
|
||||
{
|
||||
if(CPU_INT_LEVEL > FLAG_INT_MASK)
|
||||
{
|
||||
m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
87
Src/CPU/68K/Musashi/m68kctx.h
Normal file
87
Src/CPU/68K/Musashi/m68kctx.h
Normal file
|
|
@ -0,0 +1,87 @@
|
|||
/**
|
||||
** Supermodel
|
||||
** A Sega Model 3 Arcade Emulator.
|
||||
** Copyright 2011 Bart Trzynadlowski
|
||||
**
|
||||
** This file is part of Supermodel.
|
||||
**
|
||||
** Supermodel is free software: you can redistribute it and/or modify it under
|
||||
** the terms of the GNU General Public License as published by the Free
|
||||
** Software Foundation, either version 3 of the License, or (at your option)
|
||||
** any later version.
|
||||
**
|
||||
** Supermodel is distributed in the hope that it will be useful, but WITHOUT
|
||||
** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
** more details.
|
||||
**
|
||||
** You should have received a copy of the GNU General Public License along
|
||||
** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
|
||||
**/
|
||||
|
||||
/*
|
||||
* m68kctx.h
|
||||
*
|
||||
* Musashi CPU context. This was made a separate file to more easily facilitate
|
||||
* save state management. It is used internally by m68kcpu.h.
|
||||
*/
|
||||
|
||||
#include "Types.h" // Supermodel types
|
||||
|
||||
typedef struct
|
||||
{
|
||||
UINT32 cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, or 68020 */
|
||||
UINT32 dar[16]; /* Data and Address Registers */
|
||||
UINT32 ppc; /* Previous program counter */
|
||||
UINT32 pc; /* Program Counter */
|
||||
UINT32 sp[7]; /* User, Interrupt, and Master Stack Pointers */
|
||||
UINT32 vbr; /* Vector Base Register (m68010+) */
|
||||
UINT32 sfc; /* Source Function Code Register (m68010+) */
|
||||
UINT32 dfc; /* Destination Function Code Register (m68010+) */
|
||||
UINT32 cacr; /* Cache Control Register (m68020, unemulated) */
|
||||
UINT32 caar; /* Cache Address Register (m68020, unemulated) */
|
||||
UINT32 ir; /* Instruction Register */
|
||||
UINT32 t1_flag; /* Trace 1 */
|
||||
UINT32 t0_flag; /* Trace 0 */
|
||||
UINT32 s_flag; /* Supervisor */
|
||||
UINT32 m_flag; /* Master/Interrupt state */
|
||||
UINT32 x_flag; /* Extend */
|
||||
UINT32 n_flag; /* Negative */
|
||||
UINT32 not_z_flag; /* Zero, inverted for speedups */
|
||||
UINT32 v_flag; /* Overflow */
|
||||
UINT32 c_flag; /* Carry */
|
||||
UINT32 int_mask; /* I0-I2 */
|
||||
UINT32 int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
|
||||
UINT32 int_cycles; /* ASG: extra cycles from generated interrupts */
|
||||
UINT32 stopped; /* Stopped state */
|
||||
UINT32 pref_addr; /* Last prefetch address */
|
||||
UINT32 pref_data; /* Data in the prefetch queue */
|
||||
UINT32 address_mask; /* Available address pins */
|
||||
UINT32 sr_mask; /* Implemented status register bits */
|
||||
UINT32 instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
|
||||
UINT32 run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
|
||||
|
||||
/* Clocks required for instructions / exceptions */
|
||||
UINT32 cyc_bcc_notake_b;
|
||||
UINT32 cyc_bcc_notake_w;
|
||||
UINT32 cyc_dbcc_f_noexp;
|
||||
UINT32 cyc_dbcc_f_exp;
|
||||
UINT32 cyc_scc_r_true;
|
||||
UINT32 cyc_movem_w;
|
||||
UINT32 cyc_movem_l;
|
||||
UINT32 cyc_shift;
|
||||
UINT32 cyc_reset;
|
||||
UINT8* cyc_instruction;
|
||||
UINT8* cyc_exception;
|
||||
|
||||
/* Callbacks to host */
|
||||
int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
|
||||
void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
|
||||
void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
|
||||
void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
|
||||
void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
|
||||
void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
|
||||
void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
|
||||
void (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */
|
||||
|
||||
} m68ki_cpu_core;
|
||||
|
|
@ -509,10 +509,6 @@ void CDSB1::SaveState(CBlockFile *StateFile)
|
|||
|
||||
// Z80 CPU state
|
||||
Z80.SaveState(StateFile, "DSB1 Z80");
|
||||
|
||||
//DEBUG
|
||||
//printf("usingMPEGStart=%X usingMPEGEnd=%X\n", usingMPEGStart, usingMPEGEnd);
|
||||
//printf("usingLoopStart=%X usingLoopEnd=%X\n", usingLoopStart, usingLoopEnd);
|
||||
}
|
||||
|
||||
void CDSB1::LoadState(CBlockFile *StateFile)
|
||||
|
|
@ -558,10 +554,6 @@ void CDSB1::LoadState(CBlockFile *StateFile)
|
|||
}
|
||||
else
|
||||
MPEG_StopPlaying();
|
||||
|
||||
//DEBUG
|
||||
//printf("usingMPEGStart=%X usingMPEGEnd=%X\n", usingMPEGStart, usingMPEGEnd);
|
||||
//printf("usingLoopStart=%X usingLoopEnd=%X\n", usingLoopStart, usingLoopEnd);
|
||||
}
|
||||
|
||||
// Offsets of memory regions within DSB1's pool
|
||||
|
|
@ -1075,6 +1067,7 @@ void CDSB2::SaveState(CBlockFile *StateFile)
|
|||
M68KSaveState(StateFile, "DSB2 68K");
|
||||
|
||||
//DEBUG
|
||||
//printf("DSB2 PC=%06X\n", M68KGetPC());
|
||||
//printf("mpegStart=%X, mpegEnd=%X\n", mpegStart, mpegEnd);
|
||||
//printf("usingMPEGStart=%X, usingMPEGEnd=%X\n", usingMPEGStart, usingMPEGEnd);
|
||||
//printf("usingLoopStart=%X, usingLoopEnd=%X\n", usingLoopStart, usingLoopEnd);
|
||||
|
|
@ -1125,6 +1118,7 @@ void CDSB2::LoadState(CBlockFile *StateFile)
|
|||
MPEG_StopPlaying();
|
||||
|
||||
//DEBUG
|
||||
//printf("DSB2 PC=%06X\n", M68KGetPC());
|
||||
//printf("mpegStart=%X, mpegEnd=%X\n", mpegStart, mpegEnd);
|
||||
//printf("usingMPEGStart=%X, usingMPEGEnd=%X\n", usingMPEGStart, usingMPEGEnd);
|
||||
//printf("usingLoopStart=%X, usingLoopEnd=%X\n", usingLoopStart, usingLoopEnd);
|
||||
|
|
|
|||
|
|
@ -53,7 +53,7 @@ int m1fread(unsigned char *buf, int size1, int size2, void *f)
|
|||
|
||||
if (in_file) return fread(buf, size1, size2, (FILE *) f);
|
||||
|
||||
//printf("total=%X, offset=%X, end=%X\n", total, offset, end);
|
||||
//printf("fstart=%X, total=%X, offset=%X, end=%X\n", fstart, total, offset, end);
|
||||
|
||||
// if past EOF
|
||||
if ((total + offset) >= end)
|
||||
|
|
|
|||
Loading…
Reference in a new issue