mirror of
https://github.com/RetroDECK/Supermodel.git
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SCSP: added more detail to comment explaining 68K clock speed as recommended by Brian Troha
This commit is contained in:
Bart Trzynadlowski
parent
b2fee4242c
commit
ebff9a8b2d
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@ -7,7 +7,7 @@
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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** the terms of the GNU General Public License as published by the Free
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** the terms of the GNU General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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@ -19,17 +19,17 @@
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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/*
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* SCSP.cpp
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*
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*
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* WARNING: Here be dragons! Tread carefully. Enabling/disabling things may
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* break save state support.
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*
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* SCSP (Sega Custom Sound Processor) emulation. This code was generously
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* donated by ElSemi. Interfaces directly to the 68K processor through
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* callbacks. Some minor interface changes were made (external global variables
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* were removed).
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* were removed).
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*
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* The MIDI input buffer has been increased from 8 (which I assume is the
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* actual size) in order to accommodate Model 3's PowerPC/68K communication.
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@ -44,7 +44,7 @@
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*/
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/*
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/*
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SEGA Custom Sound Processor (SCSP) Emulation
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by ElSemi.
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Driven by MC68000
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@ -78,7 +78,7 @@ Anyways credit to R. Belmont and ElSemi for the code, and for being awesome emul
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static const Util::Config::Node *s_config = 0;
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static bool s_multiThreaded = false;
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bool legacySound; // For LegacySound (SCSP DSP) config option.
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bool legacySound; // For LegacySound (SCSP DSP) config option.
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#define USEDSP
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//#define RB_VOLUME
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@ -212,7 +212,7 @@ static int TimCnt[3];
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#define PLFOWS(slot) ((slot->data[0x9] >> 0x8) & 0x0003)
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#define PLFOS(slot) ((slot->data[0x9] >> 0x5) & 0x000E) // Setting this to 14 seems to make FM more precise
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#define ALFOWS(slot) ((slot->data[0x9] >> 0x3) & 0x0003)
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#define ALFOS(slot) ((slot->data[0x9] >> 0x0) & 0x0007)
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#define ALFOS(slot) ((slot->data[0x9] >> 0x0) & 0x0007)
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#define ISEL(slot) ((slot->data[0xA] >> 0x3) & 0x000F)
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#define IMXL(slot) ((slot->data[0xA] >> 0x0) & 0x0007)
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@ -347,7 +347,7 @@ void CheckPendingIRQ()
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{
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DWORD pend=SCSPs->data[0x20/2];
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DWORD en=SCSPs->data[0x1e/2];
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/*
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* MIDI FIFO critical section
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*
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@ -361,20 +361,20 @@ void CheckPendingIRQ()
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{
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//if (g_Config.multiThreaded)
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// MIDILock->Unlock();
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//SCSP.data[0x20/2]|=0x8; //Hold midi line while there are commands pending
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//Int68kCB(IrqMidi);
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//printf("68K: MIDI IRQ\n");
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//ErrorLogMessage("Midi");
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SCSP->data[0x20 / 2] |= 8;
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pend |= 8;
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}
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//if (g_Config.multiThreaded)
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// MIDILock->Unlock();
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if(!pend)
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return;
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if(pend&0x40)
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@ -629,7 +629,7 @@ bool SCSP_Init(const Util::Config::Node &config, int n)
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MidiOutR=MidiOutW=0;
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MidiOutFill=0;
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MidiInFill=0;
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for(int i=0;i<0x400;++i)
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{
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@ -638,7 +638,7 @@ bool SCSP_Init(const Util::Config::Node &config, int n)
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fcent=(double) 44100.0*exp2(fcent/1200.0);
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FNS_Table[i]=(UINT32)((float) (1<<SHIFT) *fcent);
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//FNS_Table[i]=(i>>(10-SHIFT))|(1<<SHIFT);
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}
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for (int i = 0; i < 0x400; ++i) {
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float envDB = ((float)(3 * (i - 0x3ff))) / 32.0f;
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@ -721,7 +721,7 @@ bool SCSP_Init(const Util::Config::Node &config, int n)
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// int a=1;
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//if(iTL==0x3a)
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// int a=1;
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LPANTABLE[i]=FIX((4.0*LPAN*TL*SDL));
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RPANTABLE[i]=FIX((4.0*RPAN*TL*SDL));
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}
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@ -746,7 +746,7 @@ bool SCSP_Init(const Util::Config::Node &config, int n)
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scale=(double) (1<<EG_SHIFT);
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DRTABLE[i]=(int) (step*scale);
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}
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for(int i=0;i<32;++i)
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SCSPs[0].Slots[i].slot=i;
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@ -761,14 +761,14 @@ bool SCSP_Init(const Util::Config::Node &config, int n)
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TimCnt[0] = 0xffff;
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TimCnt[1] = 0xffff;
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TimCnt[2] = 0xffff;
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// MIDI FIFO mutex
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MIDILock = CThread::CreateMutex();
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if (NULL == MIDILock)
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{
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return ErrorLog("Unable to create MIDI mutex!");
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}
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return OKAY;
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}
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@ -850,7 +850,7 @@ void SCSP_UpdateReg(int reg)
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case 8:
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case 9:
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SCSP->data[0x8 / 2] &= 0xf800;
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SCSP->data[0x8 / 2] &= 0xf800;
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break;
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case 0x12:
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case 0x13:
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@ -864,7 +864,7 @@ void SCSP_UpdateReg(int reg)
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break;
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case 0x18:
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case 0x19:
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if(SCSP->Master)
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if(SCSP->Master)
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{
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TimPris[0]=1<<((SCSPs->data[0x18/2]>>8)&0x7);
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TimCnt[0]=((SCSPs->data[0x18/2]&0xfe)<<8)/*|(TimCnt[0]&0xff)*/;
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@ -872,7 +872,7 @@ void SCSP_UpdateReg(int reg)
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break;
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case 0x1a:
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case 0x1b:
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if(SCSP->Master)
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if(SCSP->Master)
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{
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TimPris[1]=1<<((SCSPs->data[0x1A/2]>>8)&0x7);
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TimCnt[1]=((SCSPs->data[0x1A/2]&0xfe)<<8)/*|(TimCnt[1]&0xff)*/;
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@ -880,7 +880,7 @@ void SCSP_UpdateReg(int reg)
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break;
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case 0x1C:
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case 0x1D:
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if(SCSP->Master)
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if(SCSP->Master)
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{
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TimPris[2]=1<<((SCSPs->data[0x1C/2]>>8)&0x7);
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TimCnt[2]=((SCSPs->data[0x1C/2]&0xfe)<<8)/*|(TimCnt[2]&0xff)*/;
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@ -888,7 +888,7 @@ void SCSP_UpdateReg(int reg)
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break;
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case 0x22: //SCIRE
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case 0x23:
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if(SCSP->Master)
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if(SCSP->Master)
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{
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SCSP->data[0x20 / 2] &= ~SCSP->data[0x22 / 2];
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//ResetInterrupts();
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@ -1026,7 +1026,7 @@ void SCSP_w8(unsigned int addr,unsigned char val)
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{
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*(unsigned char *) &(SCSP->datab[(addr&0xff)^1]) = val;
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SCSP_UpdateReg((addr^1)&0xff);
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}
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}
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else if(addr<0x700)
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SCSP->RINGBUF[(addr-0x600)/2]=val;
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else
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@ -1093,7 +1093,7 @@ void SCSP_w16(unsigned int addr,unsigned short val)
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*((unsigned short *)(SCSP->datab + ((addr & 0x3f)))) = val;
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SCSP_UpdateReg(addr & 0x3f);
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}
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}
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}
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else if (addr < 0x700)
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SCSP->RINGBUF[(addr - 0x600) / 2] = val;
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else
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@ -1159,7 +1159,7 @@ void SCSP_w32(unsigned int addr,unsigned int val)
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*(unsigned int *) &(SCSP->datab[addr&0xff]) = val;
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SCSP_UpdateReg(addr&0xff);
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SCSP_UpdateReg((addr&0xff)+2);
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}
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}
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else if(addr<0x700)
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int a=1;
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else
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@ -1193,7 +1193,7 @@ unsigned char SCSP_r8(unsigned int addr)
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int slot=addr/0x20;
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addr&=0x1f;
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SCSP_UpdateSlotRegR(slot,(addr^1)&0x1f);
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v=*(unsigned char *) &(SCSP->Slots[slot].datab[addr^1]);
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//DebugLog("Slot %02X Reg %02X Read byte %02X",slot,addr^1,v);
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}
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@ -1201,8 +1201,8 @@ unsigned char SCSP_r8(unsigned int addr)
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{
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SCSP_UpdateRegR(addr&0xff);
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v= *(unsigned char *) &(SCSP->datab[(addr&0xff)^1]);
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//ErrorLogMessage("SCSP Reg %02X Read byte %02X",addr&0xff,v);
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}
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//ErrorLogMessage("SCSP Reg %02X Read byte %02X",addr&0xff,v);
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}
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else if(addr<0x700)
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v=0;
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return v;
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@ -1230,7 +1230,7 @@ unsigned short SCSP_r16(unsigned int addr)
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SCSP_UpdateRegR(addr & 0x3f);
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v = *((UINT16 *)(SCSP->datab + ((addr & 0x3f))));
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}
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}
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}
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else if (addr < 0x700)
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v = SCSP->RINGBUF[(addr - 0x600) / 2];
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else
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@ -1473,7 +1473,7 @@ signed int inline SCSP_UpdateSlot(_SLOT *slot)
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if (!SDIR(slot))
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{
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if (ALFOS(slot) != 0)
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if (ALFOS(slot) != 0)
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{
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sample = sample * ALFO_Step(&(slot->ALFO));
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sample >>= (SHIFT);
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@ -1513,7 +1513,7 @@ void SCSP_CpuRunScanline()
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void SCSP_DoMasterSamples(int nsamples)
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{
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const int slice = 11289600 / 44100; // 68K runs at 256 cycles/sample
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const int slice = 11289600 / 44100; // 68K clocked at 11.2896MHz (45.1584MHz OSC / 4), which is 256 cycles/sample
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static int lastdiff = 0;
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/*
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@ -1560,7 +1560,7 @@ void SCSP_DoMasterSamples(int nsamples)
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#ifdef RB_VOLUME
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smpfl += (sample * volume[TL(slot) + pan_left[DIPAN(slot)]]) >> 17;
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smpfr += (sample * volume[TL(slot) + pan_right[DIPAN(slot)]]) >> 17;
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#else
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#else
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{
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smpfl += (sample*LPANTABLE[Enc]) >> SHIFT;
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smpfr += (sample*RPANTABLE[Enc]) >> SHIFT;
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@ -1597,7 +1597,7 @@ void SCSP_DoMasterSamples(int nsamples)
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#ifdef RB_VOLUME
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smprl += (sample * volume[TL(slot) + pan_left[DIPAN(slot)]]) >> 17;
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smprr += (sample * volume[TL(slot) + pan_right[DIPAN(slot)]]) >> 17;
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#else
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#else
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smprl += (sample*LPANTABLE[Enc]) >> SHIFT;
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smprr += (sample*RPANTABLE[Enc]) >> SHIFT;
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}
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@ -1740,7 +1740,7 @@ void SCSP_MidiIn(BYTE val)
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*/
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if (s_multiThreaded)
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MIDILock->Lock();
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//DebugLog("Midi Buffer push %02X",val);
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MidiStack[MidiW++]=val;
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MidiW&=MIDI_STACK_SIZE_MASK;
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@ -1777,7 +1777,7 @@ unsigned char SCSP_MidiOutR()
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if(MidiOutR==MidiOutW) // I don't think this needs to be a critical section...
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return 0xff;
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/*
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* MIDI FIFO critical section
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*/
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@ -1788,17 +1788,17 @@ unsigned char SCSP_MidiOutR()
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//DebugLog("Midi Out Buffer pop %02X",val);
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MidiOutR&=31;
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--MidiOutFill;
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if (s_multiThreaded)
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MIDILock->Unlock();
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return val;
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}
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unsigned char SCSP_MidiOutFill()
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{
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unsigned char v;
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/*
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* MIDI FIFO critical section
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*/
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@ -1806,17 +1806,17 @@ unsigned char SCSP_MidiOutFill()
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MIDILock->Lock();
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v = MidiOutFill;
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if (s_multiThreaded)
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MIDILock->Unlock();
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return v;
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}
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unsigned char SCSP_MidiInFill()
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{
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unsigned char v;
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/*
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* MIDI FIFO critical section
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*/
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@ -1824,10 +1824,10 @@ unsigned char SCSP_MidiInFill()
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MIDILock->Lock();
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v = MidiInFill;
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if (s_multiThreaded)
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MIDILock->Unlock();
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return v;
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}
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@ -1934,13 +1934,13 @@ unsigned int SCSP_Slave_r32(unsigned int addr)
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void SCSP_SaveState(CBlockFile *StateFile)
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{
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StateFile->NewBlock("SCSP x 2", __FILE__);
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/*
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* Save global variables.
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*
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* Difficult to say exactly what is necessary given that many things are
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* commented out and should not be enabled but I try to save as much as
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* possible.
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* possible.
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*
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* Things not saved:
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*
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@ -1962,7 +1962,7 @@ void SCSP_SaveState(CBlockFile *StateFile)
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StateFile->Write(&MidiR, sizeof(MidiR));
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StateFile->Write(TimPris, sizeof(TimPris));
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StateFile->Write(TimCnt, sizeof(TimCnt));
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// Save both SCSP states
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for (int i = 0; i < 2; i++)
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{
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@ -1973,13 +1973,13 @@ void SCSP_SaveState(CBlockFile *StateFile)
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StateFile->Write(&(SCSPs[i].DELAYBUF), sizeof(SCSPs[i].DELAYBUF));
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StateFile->Write(&(SCSPs[i].DELAYPTR), sizeof(SCSPs[i].DELAYPTR));
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#endif
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// Save each slot
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for (int j = 0; j < 32; j++)
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{
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UINT64 baseOffset;
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UINT8 egState;
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StateFile->Write(SCSPs[i].Slots[j].datab, sizeof(SCSPs[i].Slots[j].datab));
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StateFile->Write(&(SCSPs[i].Slots[j].active), sizeof(SCSPs[i].Slots[j].active));
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baseOffset = (UINT64) (SCSPs[i].Slots[j].base - SCSPs[i].SCSPRAM);
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@ -1990,7 +1990,7 @@ void SCSP_SaveState(CBlockFile *StateFile)
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StateFile->Write(&(SCSPs[i].Slots[j].Back), sizeof(SCSPs[i].Slots[j].Back));
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StateFile->Write(&(SCSPs[i].Slots[j].slot), sizeof(SCSPs[i].Slots[j].slot));
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StateFile->Write(&(SCSPs[i].Slots[j].Prev), sizeof(SCSPs[i].Slots[j].Prev));
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// EG
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StateFile->Write(&(SCSPs[i].Slots[j].EG.volume), sizeof(SCSPs[i].Slots[j].EG.volume));
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egState = SCSPs[i].Slots[j].EG.state;
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@ -2003,18 +2003,18 @@ void SCSP_SaveState(CBlockFile *StateFile)
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StateFile->Write(&(SCSPs[i].Slots[j].EG.DL), sizeof(SCSPs[i].Slots[j].EG.DL));
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StateFile->Write(&(SCSPs[i].Slots[j].EG.EGHOLD), sizeof(SCSPs[i].Slots[j].EG.EGHOLD));
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StateFile->Write(&(SCSPs[i].Slots[j].EG.LPLINK), sizeof(SCSPs[i].Slots[j].EG.LPLINK));
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// PLFO
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StateFile->Write(&(SCSPs[i].Slots[j].PLFO.phase), sizeof(SCSPs[i].Slots[j].PLFO.phase));
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StateFile->Write(&(SCSPs[i].Slots[j].PLFO.phase_step), sizeof(SCSPs[i].Slots[j].PLFO.phase_step));
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// ALFO
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StateFile->Write(&(SCSPs[i].Slots[j].ALFO.phase), sizeof(SCSPs[i].Slots[j].ALFO.phase));
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StateFile->Write(&(SCSPs[i].Slots[j].ALFO.phase_step), sizeof(SCSPs[i].Slots[j].ALFO.phase_step));
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//when loading, make sure to compute lfo
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}
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// DSP
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StateFile->Write(&(SCSPs[i].DSP.RBP), sizeof(SCSPs[i].DSP.RBP));
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StateFile->Write(&(SCSPs[i].DSP.RBL), sizeof(SCSPs[i].DSP.RBL));
|
||||
|
|
@ -2039,7 +2039,7 @@ void SCSP_LoadState(CBlockFile *StateFile)
|
|||
ErrorLog("Unable to load SCSP state. Save state file is corrupt.");
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
// Load global variables
|
||||
StateFile->Read(&IrqTimA, sizeof(IrqTimA));
|
||||
StateFile->Read(&IrqTimBC, sizeof(IrqTimBC));
|
||||
|
|
@ -2054,7 +2054,7 @@ void SCSP_LoadState(CBlockFile *StateFile)
|
|||
StateFile->Read(&MidiR, sizeof(MidiR));
|
||||
StateFile->Read(TimPris, sizeof(TimPris));
|
||||
StateFile->Read(TimCnt, sizeof(TimCnt));
|
||||
|
||||
|
||||
// Load both SCSP states
|
||||
for (int i = 0; i < 2; i++)
|
||||
{
|
||||
|
|
@ -2065,13 +2065,13 @@ void SCSP_LoadState(CBlockFile *StateFile)
|
|||
StateFile->Read(&(SCSPs[i].DELAYBUF), sizeof(SCSPs[i].DELAYBUF));
|
||||
StateFile->Read(&(SCSPs[i].DELAYPTR), sizeof(SCSPs[i].DELAYPTR));
|
||||
#endif
|
||||
|
||||
|
||||
// Load each slot
|
||||
for (int j = 0; j < 32; j++)
|
||||
{
|
||||
UINT64 baseOffset;
|
||||
UINT8 egState;
|
||||
|
||||
|
||||
StateFile->Read(SCSPs[i].Slots[j].datab, sizeof(SCSPs[i].Slots[j].datab));
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].active), sizeof(SCSPs[i].Slots[j].active));
|
||||
StateFile->Read(&baseOffset, sizeof(baseOffset));
|
||||
|
|
@ -2082,7 +2082,7 @@ void SCSP_LoadState(CBlockFile *StateFile)
|
|||
StateFile->Read(&(SCSPs[i].Slots[j].Back), sizeof(SCSPs[i].Slots[j].Back));
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].slot), sizeof(SCSPs[i].Slots[j].slot));
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].Prev), sizeof(SCSPs[i].Slots[j].Prev));
|
||||
|
||||
|
||||
// EG
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].EG.volume), sizeof(SCSPs[i].Slots[j].EG.volume));
|
||||
StateFile->Read(&egState, sizeof(egState));
|
||||
|
|
@ -2095,11 +2095,11 @@ void SCSP_LoadState(CBlockFile *StateFile)
|
|||
StateFile->Read(&(SCSPs[i].Slots[j].EG.DL), sizeof(SCSPs[i].Slots[j].EG.DL));
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].EG.EGHOLD), sizeof(SCSPs[i].Slots[j].EG.EGHOLD));
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].EG.LPLINK), sizeof(SCSPs[i].Slots[j].EG.LPLINK));
|
||||
|
||||
|
||||
// PLFO
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].PLFO.phase), sizeof(SCSPs[i].Slots[j].PLFO.phase));
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].PLFO.phase_step), sizeof(SCSPs[i].Slots[j].PLFO.phase_step));
|
||||
|
||||
|
||||
// ALFO
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].ALFO.phase), sizeof(SCSPs[i].Slots[j].ALFO.phase));
|
||||
StateFile->Read(&(SCSPs[i].Slots[j].ALFO.phase_step), sizeof(SCSPs[i].Slots[j].ALFO.phase_step));
|
||||
|
|
@ -2107,7 +2107,7 @@ void SCSP_LoadState(CBlockFile *StateFile)
|
|||
// Recompute LFOs
|
||||
Compute_LFO(&(SCSPs[i].Slots[j]));
|
||||
}
|
||||
|
||||
|
||||
// DSP
|
||||
StateFile->Read(&(SCSPs[i].DSP.RBP), sizeof(SCSPs[i].DSP.RBP));
|
||||
StateFile->Read(&(SCSPs[i].DSP.RBL), sizeof(SCSPs[i].DSP.RBL));
|
||||
|
|
|
|||
Loading…
Reference in a new issue