mirror of
https://github.com/RetroDECK/Supermodel.git
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343 lines
8.2 KiB
C
343 lines
8.2 KiB
C
/**
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** Supermodel
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** A Sega Model 3 Arcade Emulator.
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** Copyright 2011 Bart Trzynadlowski
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**
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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** the terms of the GNU General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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** Supermodel is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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** more details.
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**
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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/*
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* ppc603.c
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*
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* PowerPC 603e functions. Included from ppc.cpp; do not compile separately.
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*/
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void ppc603_exception(int exception)
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{
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#ifdef SUPERMODEL_DEBUGGER
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if (PPCDebug != NULL)
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PPCDebug->CheckException(exception);
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#endif
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switch( exception )
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{
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case EXCEPTION_IRQ: /* External Interrupt */
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if( ppc_get_msr() & MSR_EE ) {
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UINT32 msr = ppc_get_msr();
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SRR0 = ppc.npc;
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SRR1 = msr & 0xff73;
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msr &= ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI);
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if( msr & MSR_ILE )
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msr |= MSR_LE;
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else
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msr &= ~MSR_LE;
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ppc_set_msr(msr);
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if( msr & MSR_IP )
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ppc.npc = 0xfff00000 | 0x0500;
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else
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ppc.npc = 0x00000000 | 0x0500;
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ppc.interrupt_pending &= ~0x1;
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ppc_change_pc(ppc.npc);
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}
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break;
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case EXCEPTION_DECREMENTER: /* Decrementer overflow exception */
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if( ppc_get_msr() & MSR_EE ) {
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UINT32 msr = ppc_get_msr();
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SRR0 = ppc.npc;
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SRR1 = msr & 0xff73;
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msr &= ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI);
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if( msr & MSR_ILE )
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msr |= MSR_LE;
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else
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msr &= ~MSR_LE;
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ppc_set_msr(msr);
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if( msr & MSR_IP )
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ppc.npc = 0xfff00000 | 0x0900;
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else
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ppc.npc = 0x00000000 | 0x0900;
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ppc.interrupt_pending &= ~0x2;
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ppc_change_pc(ppc.npc);
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}
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break;
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case EXCEPTION_TRAP: /* Program exception / Trap */
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{
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UINT32 msr = ppc_get_msr();
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SRR0 = ppc.pc;
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SRR1 = (msr & 0xff73) | 0x20000; /* 0x20000 = TRAP bit */
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msr &= ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI);
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if( msr & MSR_ILE )
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msr |= MSR_LE;
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else
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msr &= ~MSR_LE;
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ppc_set_msr(msr);
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if( msr & MSR_IP )
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ppc.npc = 0xfff00000 | 0x0700;
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else
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ppc.npc = 0x00000000 | 0x0700;
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ppc_change_pc(ppc.npc);
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}
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break;
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case EXCEPTION_SYSTEM_CALL: /* System call */
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{
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UINT32 msr = ppc_get_msr();
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SRR0 = ppc.npc;
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SRR1 = (msr & 0xff73);
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msr &= ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI);
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if( msr & MSR_ILE )
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msr |= MSR_LE;
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else
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msr &= ~MSR_LE;
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ppc_set_msr(msr);
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if( msr & MSR_IP )
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ppc.npc = 0xfff00000 | 0x0c00;
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else
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ppc.npc = 0x00000000 | 0x0c00;
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ppc_change_pc(ppc.npc);
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}
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break;
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case EXCEPTION_SMI:
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if( ppc_get_msr() & MSR_EE ) {
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UINT32 msr = ppc_get_msr();
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SRR0 = ppc.npc;
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SRR1 = msr & 0xff73;
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msr &= ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI);
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if( msr & MSR_ILE )
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msr |= MSR_LE;
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else
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msr &= ~MSR_LE;
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ppc_set_msr(msr);
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if( msr & MSR_IP )
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ppc.npc = 0xfff00000 | 0x1400;
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else
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ppc.npc = 0x00000000 | 0x1400;
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ppc.interrupt_pending &= ~0x4;
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ppc_change_pc(ppc.npc);
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}
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break;
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case EXCEPTION_DSI:
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{
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UINT32 msr = ppc_get_msr();
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SRR0 = ppc.npc;
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SRR1 = msr & 0xff73;
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msr &= ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI);
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if( msr & MSR_ILE )
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msr |= MSR_LE;
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else
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msr &= ~MSR_LE;
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ppc_set_msr(msr);
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if( msr & MSR_IP )
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ppc.npc = 0xfff00000 | 0x0300;
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else
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ppc.npc = 0x00000000 | 0x0300;
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ppc.interrupt_pending &= ~0x4;
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ppc_change_pc(ppc.npc);
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}
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break;
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case EXCEPTION_ISI:
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{
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UINT32 msr = ppc_get_msr();
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SRR0 = ppc.npc;
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SRR1 = msr & 0xff73;
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msr &= ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI);
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if( msr & MSR_ILE )
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msr |= MSR_LE;
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else
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msr &= ~MSR_LE;
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ppc_set_msr(msr);
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if( msr & MSR_IP )
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ppc.npc = 0xfff00000 | 0x0400;
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else
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ppc.npc = 0x00000000 | 0x0400;
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ppc.interrupt_pending &= ~0x4;
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ppc_change_pc(ppc.npc);
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}
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break;
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default:
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ErrorLog("PowerPC triggered an unknown exception. Emulation halted until reset.");
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DebugLog("PowerPC triggered an unknown exception (%d).\n", exception);
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ppc.fatalError = true;
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break;
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}
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}
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static void ppc603_set_smi_line(int state)
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{
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if( state ) {
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ppc.interrupt_pending |= 0x4;
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}
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}
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static void ppc603_check_interrupts(void)
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{
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if (MSR & MSR_EE)
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{
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if (ppc.interrupt_pending != 0)
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{
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if (ppc.interrupt_pending & 0x1)
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{
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ppc603_exception(EXCEPTION_IRQ);
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}
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else if (ppc.interrupt_pending & 0x2)
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{
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ppc603_exception(EXCEPTION_DECREMENTER);
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}
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else if (ppc.interrupt_pending & 0x4)
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{
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ppc603_exception(EXCEPTION_SMI);
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}
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}
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}
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}
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void ppc_reset(void)
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{
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ppc.fatalError = false; // reset the fatal error flag
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ppc.pc = ppc.npc = 0xfff00100;
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ppc_set_msr(0x40);
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ppc_change_pc(ppc.pc);
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ppc.hid0 = 1;
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ppc.interrupt_pending = 0;
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}
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int ppc_execute(int cycles)
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{
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UINT32 opcode;
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ppc_icount = cycles;
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ppc_tb_base_icount = cycles;
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ppc_dec_base_icount = cycles + ppc.dec_frac;
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// check if decrementer exception occurs during execution
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if ((UINT32)(DEC - (cycles / (bus_freq_multiplier * 2))) > (UINT32)(DEC))
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{
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ppc_dec_trigger_cycle = ((cycles / (bus_freq_multiplier * 2)) - DEC) * 4;
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}
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else
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{
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ppc_dec_trigger_cycle = 0x7fffffff;
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}
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ppc_change_pc(ppc.npc);
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/*{
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char string1[200];
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char string2[200];
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opcode = BSWAP32(*ppc.op);
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DisassemblePowerPC(opcode, ppc.npc, string1, string2, true);
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printf("%08X: %s %s\n", ppc.npc, string1, string2);
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}*/
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// printf("trigger cycle %d (%08X)\n", ppc_dec_trigger_cycle, ppc_dec_trigger_cycle);
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// printf("tb = %08X %08X\n", (UINT32)(ppc.tb >> 32), (UINT32)(ppc.tb));
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ppc603_check_interrupts();
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while( ppc_icount > 0 && !ppc.fatalError)
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{
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ppc.pc = ppc.npc;
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// Debug breakpoints
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//if (ppc.pc == 0x9e4d4)
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// printf("%X R0=%08X\n", ppc.pc, REG(0));
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opcode = *ppc.op++; // Supermodel byte reverses each aligned word (converting them to little endian) so they can be fetched directly
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ppc.npc = ppc.pc + 4;
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#ifdef SUPERMODEL_DEBUGGER
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if (PPCDebug != NULL)
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{
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while (PPCDebug->CheckExecution(ppc.pc, opcode))
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opcode = *ppc.op++;
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}
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#endif
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switch(opcode >> 26)
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{
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case 19: optable19[(opcode >> 1) & 0x3ff](opcode); break;
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case 31: optable31[(opcode >> 1) & 0x3ff](opcode); break;
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case 59: optable59[(opcode >> 1) & 0x3ff](opcode); break;
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case 63: optable63[(opcode >> 1) & 0x3ff](opcode); break;
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default: optable[opcode >> 26](opcode); break;
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}
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ppc_icount--;
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if(ppc_icount == ppc_dec_trigger_cycle)
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{
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// printf("dec int at %d\n", ppc_icount);
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ppc.interrupt_pending |= 0x2;
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ppc603_check_interrupts();
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}
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//ppc603_check_interrupts();
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}
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// update timebase
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// timebase is incremented once every four core clock cycles, so adjust the cycles accordingly
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ppc.tb += ((ppc_tb_base_icount - ppc_icount) / 4);
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// update decrementer
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ppc.dec_frac = ((ppc_dec_base_icount - ppc_icount) % (bus_freq_multiplier * 2));
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DEC -= ((ppc_dec_base_icount - ppc_icount) / (bus_freq_multiplier * 2));
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/*
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{
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char string1[200];
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char string2[200];
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opcode = BSWAP32(*ppc.op);
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DisassemblePowerPC(opcode, ppc.npc, string1, string2, true);
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printf("%08X: %s %s\n", ppc.npc, string1, string2);
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}
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*/
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return cycles - ppc_icount;
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}
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