mirror of
https://github.com/RetroDECK/Supermodel.git
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220 lines
6.9 KiB
C++
220 lines
6.9 KiB
C++
/**
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** Supermodel
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** A Sega Model 3 Arcade Emulator.
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** Copyright 2011-2017 Bart Trzynadlowski, Nik Henson, Ian Curtis
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**
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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** the terms of the GNU General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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** Supermodel is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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** more details.
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**
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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/*
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* JTAG.cpp
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*
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* Model 3's JTAG test access port (TAP). This is accessed through the system
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* register space and is connected to the Real3D chipset and possibly other
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* devices. Hence, it is emulated as an independent module.
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*
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* It is unclear which exact JTAG standard the device conforms to (and it
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* probably doesn't matter), so we assume IEEE 1149.1-1990 here.
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*/
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#include "JTAG.h"
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#include "Supermodel.h"
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#include "Real3D.h"
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#include <iostream>
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// Finite state machine. Each state has two possible next states.
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const CJTAG::State CJTAG::s_fsm[][2] =
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{
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// tms = 0 tms = 1
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{ RunTestIdle, TestLogicReset }, // 0 Test-Logic/Reset
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{ RunTestIdle, SelectDRScan }, // 1 Run-Test/Idle
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{ CaptureDR, SelectIRScan }, // 2 Select-DR-Scan
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{ ShiftDR, Exit1DR }, // 3 Capture-DR
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{ ShiftDR, Exit1DR }, // 4 Shift-DR
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{ PauseDR, UpdateDR }, // 5 Exit1-DR
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{ PauseDR, Exit2DR }, // 6 Pause-DR
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{ ShiftDR, UpdateDR }, // 7 Exit2-DR
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{ RunTestIdle, SelectDRScan }, // 8 Update-DR
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{ CaptureIR, TestLogicReset }, // 9 Select-IR-Scan
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{ ShiftIR, Exit1IR }, // 10 Capture-IR
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{ ShiftIR, Exit1IR }, // 11 Shift-IR
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{ PauseIR, UpdateIR }, // 12 Exit1-IR
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{ PauseIR, Exit2IR }, // 13 Pause-IR
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{ ShiftIR, UpdateIR }, // 14 Exit2-IR
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{ RunTestIdle, SelectDRScan } // 15 Update-IR
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};
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const char *CJTAG::s_state[] =
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{
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"Test-Logic/Reset",
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"Run-Test/Idle",
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"Select-DR-Scan",
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"Capture-DR",
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"Shift-DR",
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"Exit1-DR",
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"Pause-DR",
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"Exit2-DR",
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"Update-DR",
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"Select-IR-Scan",
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"Capture-IR",
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"Shift-IR",
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"Exit1-IR",
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"Pause-IR",
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"Exit2-IR",
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"Update-IR"
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};
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static void SaveBitRegister(CBlockFile *SaveState, const Util::BitRegister ®)
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{
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uint16_t size = (uint16_t)reg.Size() + 1; // include null terminator
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SaveState->Write(&size, sizeof(size));
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SaveState->Write(reg.ToBinaryString());
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}
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static void LoadBitRegister(CBlockFile *SaveState, Util::BitRegister *reg)
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{
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uint16_t size;
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SaveState->Read(&size, sizeof(size));
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char *str = new char[size];
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SaveState->Read(str, size);
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reg->Set(str);
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delete [] str;
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}
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void CJTAG::SaveState(CBlockFile *SaveState)
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{
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SaveState->NewBlock("JTAG", __FILE__);
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SaveBitRegister(SaveState, m_instructionShiftReg);
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SaveBitRegister(SaveState, m_dataShiftReg);
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SaveState->Write(&m_instructionReg, sizeof(m_instructionReg));
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SaveState->Write(&m_state, sizeof(m_state));
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SaveState->Write(&m_lastTck, sizeof(m_lastTck));
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SaveState->Write(&m_tdo, sizeof(m_tdo));
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}
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void CJTAG::LoadState(CBlockFile *SaveState)
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{
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if (OKAY != SaveState->FindBlock("JTAG"))
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{
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ErrorLog("Unable to load JTAG state. Save state file is corrupt.");
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return;
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}
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LoadBitRegister(SaveState, &m_instructionShiftReg);
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LoadBitRegister(SaveState, &m_dataShiftReg);
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SaveState->Read(&m_instructionReg, sizeof(m_instructionReg));
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SaveState->Read(&m_state, sizeof(m_state));
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SaveState->Read(&m_lastTck, sizeof(m_lastTck));
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SaveState->Read(&m_tdo, sizeof(m_tdo));
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}
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uint8_t CJTAG::Read()
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{
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return m_tdo;
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}
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void CJTAG::LoadASICIDCodes()
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{
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/*
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* ID code retrieval has not been carefully studied but based on observation,
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* it appears that the ID codes are loaded on logic reset (Step 2.x games and
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* some 1.x games rely on this) as well as instruction 0x06318fc63fff. Some
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* games rely on both (e.g., von2).
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*/
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m_dataShiftReg.SetZeros();
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m_dataShiftReg.Insert(2 + 0*32 + 0, Util::Hex(m_real3D.GetASICIDCode(CReal3D::ASIC::Jupiter)));
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m_dataShiftReg.Insert(2 + 1*32 + 0, Util::Hex(m_real3D.GetASICIDCode(CReal3D::ASIC::Mercury)));
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m_dataShiftReg.Insert(2 + 2*32 + 0, Util::Hex(m_real3D.GetASICIDCode(CReal3D::ASIC::Venus)));
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m_dataShiftReg.Insert(2 + 3*32 + 0, Util::Hex(m_real3D.GetASICIDCode(CReal3D::ASIC::Earth)));
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m_dataShiftReg.Insert(2 + 4*32 + 1, Util::Hex(m_real3D.GetASICIDCode(CReal3D::ASIC::Mars)));
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m_dataShiftReg.Insert(2 + 5*32 + 1, Util::Hex(m_real3D.GetASICIDCode(CReal3D::ASIC::Mars)));
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}
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void CJTAG::Write(uint8_t tck, uint8_t tms, uint8_t tdi, uint8_t trst)
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{
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tck = !!tck;
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tms = !!tms;
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tdi = !!tdi;
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trst = !!trst;
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//TODO: is trst used anywhere? If so, need to emulate.
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//if (!trst)
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// printf("TRST=0\n");
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//printf("%d trst=%d tms=%d tdi=%d\n", tck, trst, tms, tdi);
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// Transitions occur on rising edge
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uint8_t lastTck = m_lastTck;
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m_lastTck = tck;
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if (!tck || lastTck != 0)
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return;
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// Current state logic
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switch (m_state)
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{
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default:
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break;
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case State::TestLogicReset:
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LoadASICIDCodes();
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break;
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case State::CaptureDR:
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if (m_instructionReg == Instruction::ReadASICIDCodes)
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LoadASICIDCodes();
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break;
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case State::ShiftDR:
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m_tdo = m_dataShiftReg.ShiftOutRight(tdi);
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break;
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case State::UpdateDR:
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if (m_instructionReg == Instruction::SetReal3DRenderConfig0 || m_instructionReg == Instruction::SetReal3DRenderConfig1)
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{
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uint64_t data = m_dataShiftReg.GetBits(0, 42);
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m_real3D.WriteJTAGRegister(m_instructionReg, data);
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}
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//std::cout << "DR = " << m_dataShiftReg << std::endl;
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break;
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case State::CaptureIR:
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// Load lower 2 bits with 01 as per IEEE 1149.1-1990
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m_instructionShiftReg.Insert(44, "01");
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break;
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case State::ShiftIR:
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m_tdo = m_instructionShiftReg.ShiftOutRight(tdi);
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break;
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case State::UpdateIR:
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// Latch the instruction register (technically, this should occur on
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// falling edge of clock as per the spec)
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m_instructionReg = m_instructionShiftReg.GetBits();
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//std::cout << "IR = " << Util::Hex(m_instructionReg, 12) << std::endl;
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break;
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}
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// Go to next state
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m_state = s_fsm[m_state][tms];
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//printf(" -> %s\n", s_state[m_state]);
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}
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void CJTAG::Reset()
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{
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m_state = State::TestLogicReset;
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DebugLog("JTAG reset\n");
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}
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CJTAG::CJTAG(CReal3D &real3D)
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: m_real3D(real3D),
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m_instructionShiftReg(46, 0),
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m_dataShiftReg(197, 0)
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{
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DebugLog("Built JTAG logic\n");
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} |