mirror of
https://github.com/RetroDECK/Supermodel.git
synced 2024-11-26 23:55:40 +00:00
ddd6fa92ef
- CSoundBoard is not derived from CBus. - Optimized sound board memory handlers (now using switch statements). - Added DSB emulation (based on R. Belmont's M1 source code). - Improved ROM loading: only unique ROMs (those not shared amongst games) are used to identify games. The ROM loader will no longer get confused as easily. - General cleanup here and there, removed unused Render.h file.
226 lines
4.8 KiB
C++
226 lines
4.8 KiB
C++
/**
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** Supermodel
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** A Sega Model 3 Arcade Emulator.
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** Copyright 2011 Bart Trzynadlowski
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**
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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** the terms of the GNU General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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** Supermodel is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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** more details.
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**
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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/*
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* 68K.cpp
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*
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* 68K CPU interface. This is presently just a wrapper for the Musashi 68K core
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* and therefore, only a single CPU is supported. In the future, we may want to
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* add in another 68K core (eg., Turbo68K, A68K, or a recompiler).
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*/
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#include "Supermodel.h"
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#include "Musashi/m68k.h" // Musashi 68K core
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/******************************************************************************
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Internal Context
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An active context must be mapped before calling M68K interface functions. Only
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the bus and IRQ handlers are copied here; the CPU context is passed directly
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to Musashi.
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******************************************************************************/
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// Bus
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static CBus *Bus = NULL;
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// IRQ callback
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static int (*IRQAck)(int nIRQ) = NULL;
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/******************************************************************************
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68K Interface
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******************************************************************************/
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// CPU state
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UINT32 M68KGetARegister(int n)
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{
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m68k_register_t r;
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switch (n)
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{
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case 0: r = M68K_REG_A0; break;
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case 1: r = M68K_REG_A1; break;
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case 2: r = M68K_REG_A2; break;
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case 3: r = M68K_REG_A3; break;
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case 4: r = M68K_REG_A4; break;
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case 5: r = M68K_REG_A5; break;
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case 6: r = M68K_REG_A6; break;
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case 7: r = M68K_REG_A7; break;
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default: r = M68K_REG_A7; break;
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}
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return m68k_get_reg(NULL, r);
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}
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UINT32 M68KGetDRegister(int n)
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{
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m68k_register_t r;
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switch (n)
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{
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case 0: r = M68K_REG_D0; break;
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case 1: r = M68K_REG_D1; break;
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case 2: r = M68K_REG_D2; break;
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case 3: r = M68K_REG_D3; break;
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case 4: r = M68K_REG_D4; break;
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case 5: r = M68K_REG_D5; break;
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case 6: r = M68K_REG_D6; break;
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case 7: r = M68K_REG_D7; break;
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default: r = M68K_REG_D7; break;
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}
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return m68k_get_reg(NULL, r);
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}
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UINT32 M68KGetPC(void)
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{
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return m68k_get_reg(NULL, M68K_REG_PC);
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}
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// Emulation functions
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void M68KSetIRQ(int irqLevel)
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{
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m68k_set_irq(irqLevel);
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}
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int M68KRun(int numCycles)
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{
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return m68k_execute(numCycles);
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}
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void M68KReset(void)
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{
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m68k_pulse_reset();
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DebugLog("68K reset\n");
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}
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// Callback setup
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void M68KSetIRQCallback(int (*F)(int nIRQ))
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{
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IRQAck = F;
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}
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void M68KAttachBus(CBus *BusPtr)
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{
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Bus = BusPtr;
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DebugLog("Attached bus to 68K\n");
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}
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// Context switching
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void M68KGetContext(M68KCtx *Dest)
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{
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Dest->IRQAck = IRQAck;
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Dest->Bus = Bus;
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m68k_get_context(Dest->musashiCtx);
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}
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void M68KSetContext(M68KCtx *Src)
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{
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IRQAck = Src->IRQAck;
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Bus = Src->Bus;
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m68k_set_context(Src->musashiCtx);
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}
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// One-time initialization
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BOOL M68KInit(void)
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{
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m68k_init();
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m68k_set_cpu_type(M68K_CPU_TYPE_68000);
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m68k_set_int_ack_callback(M68KIRQCallback);
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Bus = NULL;
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DebugLog("Initialized 68K\n");
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return OKAY;
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}
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/******************************************************************************
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Musashi 68K Handlers
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Musashi/m68kconf.h has been configured to call these directly.
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******************************************************************************/
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extern "C" {
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int M68KIRQCallback(int nIRQ)
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{
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if (NULL == IRQAck) // no handler, use default behavior
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{
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m68k_set_irq(0); // clear line
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return M68K_IRQ_AUTOVECTOR;
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}
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else
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return IRQAck(nIRQ);
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}
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unsigned int FASTCALL M68KFetch8(unsigned int a)
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{
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return Bus->Read8(a);
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}
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unsigned int FASTCALL M68KFetch16(unsigned int a)
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{
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return Bus->Read16(a);
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}
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unsigned int FASTCALL M68KFetch32(unsigned int a)
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{
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return Bus->Read32(a);
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}
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unsigned int FASTCALL M68KRead8(unsigned int a)
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{
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return Bus->Read8(a);
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}
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unsigned int FASTCALL M68KRead16(unsigned int a)
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{
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return Bus->Read16(a);
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}
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unsigned int FASTCALL M68KRead32(unsigned int a)
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{
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return Bus->Read32(a);
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}
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void FASTCALL M68KWrite8(unsigned int a, unsigned int d)
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{
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Bus->Write8(a, d);
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}
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void FASTCALL M68KWrite16(unsigned int a, unsigned int d)
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{
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Bus->Write16(a, d);
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}
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void FASTCALL M68KWrite32(unsigned int a, unsigned int d)
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{
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Bus->Write32(a, d);
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}
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} // extern "C"
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