mirror of
https://github.com/RetroDECK/Supermodel.git
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87 lines
3.8 KiB
C
87 lines
3.8 KiB
C
/**
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** Supermodel
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** A Sega Model 3 Arcade Emulator.
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** Copyright 2011 Bart Trzynadlowski, Nik Henson
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**
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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** the terms of the GNU General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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** Supermodel is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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** more details.
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**
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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/*
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* m68kctx.h
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*
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* Musashi CPU context. This was made a separate file to more easily facilitate
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* save state management. It is used internally by m68kcpu.h.
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*/
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#include "Types.h" // Supermodel types
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typedef struct
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{
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UINT32 cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, or 68020 */
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UINT32 dar[16]; /* Data and Address Registers */
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UINT32 ppc; /* Previous program counter */
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UINT32 pc; /* Program Counter */
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UINT32 sp[7]; /* User, Interrupt, and Master Stack Pointers */
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UINT32 vbr; /* Vector Base Register (m68010+) */
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UINT32 sfc; /* Source Function Code Register (m68010+) */
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UINT32 dfc; /* Destination Function Code Register (m68010+) */
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UINT32 cacr; /* Cache Control Register (m68020, unemulated) */
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UINT32 caar; /* Cache Address Register (m68020, unemulated) */
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UINT32 ir; /* Instruction Register */
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UINT32 t1_flag; /* Trace 1 */
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UINT32 t0_flag; /* Trace 0 */
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UINT32 s_flag; /* Supervisor */
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UINT32 m_flag; /* Master/Interrupt state */
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UINT32 x_flag; /* Extend */
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UINT32 n_flag; /* Negative */
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UINT32 not_z_flag; /* Zero, inverted for speedups */
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UINT32 v_flag; /* Overflow */
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UINT32 c_flag; /* Carry */
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UINT32 int_mask; /* I0-I2 */
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UINT32 int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
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UINT32 int_cycles; /* ASG: extra cycles from generated interrupts */
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UINT32 stopped; /* Stopped state */
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UINT32 pref_addr; /* Last prefetch address */
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UINT32 pref_data; /* Data in the prefetch queue */
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UINT32 address_mask; /* Available address pins */
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UINT32 sr_mask; /* Implemented status register bits */
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UINT32 instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
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UINT32 run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
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/* Clocks required for instructions / exceptions */
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UINT32 cyc_bcc_notake_b;
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UINT32 cyc_bcc_notake_w;
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UINT32 cyc_dbcc_f_noexp;
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UINT32 cyc_dbcc_f_exp;
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UINT32 cyc_scc_r_true;
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UINT32 cyc_movem_w;
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UINT32 cyc_movem_l;
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UINT32 cyc_shift;
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UINT32 cyc_reset;
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UINT8* cyc_instruction;
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UINT8* cyc_exception;
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/* Callbacks to host */
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int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
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void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
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void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
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void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
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void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
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void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
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void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
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void (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */
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} m68ki_cpu_core; |