mirror of
https://github.com/RetroDECK/Supermodel.git
synced 2024-11-22 13:55:38 +00:00
46bc52bb12
- Wrapped rows that exceed 80 columns in Supermodel.ini. - Added some member and function comments to a few header files. - Changed version string to 0.2a-RC2 in anticipation of sending another release candidate build to testers. - Added GAME_INPUT_RALLY flag to dirtdvlsa, eca, and ecax. - Configuration dialog no longer refers to Sega Rally 2 and Dirt Devils; instead, "Miscellaneous Driving Game Buttons" - More additions to README.txt.
264 lines
7.1 KiB
C++
264 lines
7.1 KiB
C++
/**
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** Supermodel
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** A Sega Model 3 Arcade Emulator.
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** Copyright 2011 Bart Trzynadlowski, Nik Henson
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**
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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** the terms of the GNU General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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** Supermodel is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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** more details.
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**
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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/*
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* 93C46.cpp
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*
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* Implementation of the 93C46 serial EEPROM device.
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*
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* To-Do List
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* ----------
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* - Manual says that when a READ command is issued, the data will be
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* preceded by a leading 0. This seems to cause problems. Perhaps DO
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* should just be set to 0?
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*/
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#include <string.h>
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#include "Supermodel.h"
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/******************************************************************************
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Save States
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******************************************************************************/
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void C93C46::SaveState(CBlockFile *SaveState)
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{
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SaveState->NewBlock("93C46", __FILE__);
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SaveState->Write(regs, sizeof(regs));
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SaveState->Write(&CS, sizeof(CS));
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SaveState->Write(&CLK, sizeof(CLK));
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SaveState->Write(&DI, sizeof(DI));
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SaveState->Write(&DO, sizeof(DO));
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SaveState->Write(&bitBufferOut, sizeof(bitBufferOut));
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SaveState->Write(&bitBufferIn, sizeof(bitBufferIn));
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SaveState->Write(&bitsOut, sizeof(bitsOut));
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SaveState->Write(&receiving, sizeof(receiving));
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SaveState->Write(&addr, sizeof(addr));
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SaveState->Write(&busyCycles, sizeof(busyCycles));
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SaveState->Write(&locked, sizeof(locked));
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}
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void C93C46::LoadState(CBlockFile *SaveState)
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{
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if (OKAY != SaveState->FindBlock("93C46"))
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{
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ErrorLog("Unable to load EEPROM state. File is corrupt.");
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return;
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}
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SaveState->Read(regs, sizeof(regs));
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SaveState->Read(&CS, sizeof(CS));
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SaveState->Read(&CLK, sizeof(CLK));
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SaveState->Read(&DI, sizeof(DI));
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SaveState->Read(&DO, sizeof(DO));
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SaveState->Read(&bitBufferOut, sizeof(bitBufferOut));
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SaveState->Read(&bitBufferIn, sizeof(bitBufferIn));
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SaveState->Read(&bitsOut, sizeof(bitsOut));
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SaveState->Read(&receiving, sizeof(receiving));
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SaveState->Read(&addr, sizeof(addr));
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SaveState->Read(&busyCycles, sizeof(busyCycles));
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SaveState->Read(&locked, sizeof(locked));
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}
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/******************************************************************************
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Emulation Functions
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******************************************************************************/
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// Reverse the bit ordering
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static UINT16 ReverseBits16(UINT16 data)
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{
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UINT16 dataOut = 0, hi, lo;
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for (int i = 0; i < 16/2; i++)
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{
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// Isolate corresponding bits from high and low halves of word
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lo = (data>>i)&1;
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hi = (data>>(15-i))&1;
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// Swap them
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dataOut |= (lo<<(15-i));
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dataOut |= (hi<<i);
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}
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return dataOut;
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}
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void C93C46::Write(unsigned pinCS, unsigned pinCLK, unsigned pinDI)
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{
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unsigned prevCLK;
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//printf("EEPROM: CS=%d CLK=%d DI=%d\n", pinCS, pinCLK, pinDI);
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prevCLK = CLK;
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// Save current inputs
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CS = !!pinCS;
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CLK = !!pinCLK;
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DI = !!pinDI;
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// Active high CS. When it's brought low, reset control logic.
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if (CS == 0)
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{
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bitBufferIn = 0; // this must be cleared each time (only leading 0's can exist prior to commands)
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receiving = true; // ready to accept commands
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busyCycles = 5; // some applications require the chip to take time while writing
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return;
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}
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// Rising clock edge
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if (!prevCLK && CLK)
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{
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if (receiving == true) // is the chip receiving commands?
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{
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// Shift in a new bit
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bitBufferIn <<= 1;
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bitBufferIn |= DI;
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// Detect commands
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if ((bitBufferIn&0xFFFFFFC0) == 0x180) // READ
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{
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addr = bitBufferIn&0x3F;
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bitBufferOut = ReverseBits16(regs[addr]); // reverse so that D15 is shifted out first
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//bitBufferOut <<= 1; // a leading 0 precedes the first word read (causes problems)
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bitsOut = 0; // how many bits read out
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receiving = false; // transmitting data now
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DebugLog("93C46: READ %X\n", addr);
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}
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else if (bitBufferIn == 0x13) // WEN (write enable)
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{
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locked = false;
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DebugLog("93C46: WEN\n");
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}
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else if (bitBufferIn == 0x10) // WDS (write disable)
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{
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locked = true;
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DebugLog("93C46: WDS\n");
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}
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else if ((bitBufferIn&0xFFC00000) == 0x01400000) // WRITE
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{
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if (!locked)
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regs[(bitBufferIn>>16)&0x3F] = bitBufferIn&0xFFFF;
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DO = 1; // ready (write completed)
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DebugLog("93C46: WRITE %X=%04X (lock=%d)\n", (bitBufferIn>>16)&0x3F, bitBufferIn&0xFFFF, locked);
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}
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else if ((bitBufferIn&0xFFF00000) == 0x01100000) // WRALL (write all)
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{
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if (!locked)
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{
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for (int i = 0; i < 64; i++)
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regs[i] = bitBufferIn&0xFFFF;
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}
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DO = 1;
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DebugLog("93C46: WRALL %04X (lock=%d)\n", bitBufferIn&0xFFFF, locked);
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}
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else if ((bitBufferIn&0xFFFFFFC0) == 0x1C0) // ERASE
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{
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if (!locked)
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regs[bitBufferIn&0x3F] = 0xFFFF;
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DO = 1;
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DebugLog("93C46: ERASE %X (lock=%d)\n", bitBufferIn&0x3F, locked);
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}
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else if ((bitBufferIn&0xFFFFFFF0) == 0x120) // ERALL (erase all)
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{
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if (!locked)
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{
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for (int i = 0; i < 64; i++)
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regs[i] = 0xFFFF;
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DebugLog("93C46: ERALL (lock=%d)\n", locked);
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}
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DO = 1;
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}
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}
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else // the chip is reading out data (transmitting)
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{
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// Shift out to DO pin
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DO = bitBufferOut&1;
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bitBufferOut >>= 1;
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++bitsOut;
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// If we've shifted out an entire 16-bit word, load up the next address (no preceding 0)
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if (bitsOut == 16)
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{
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addr = (addr+1)&0x3F;
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bitBufferOut = ReverseBits16(regs[addr]);
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bitsOut = 0;
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DebugLog("93C46: Next word loaded: %X\n", addr);
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}
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}
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}
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}
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unsigned C93C46::Read(void)
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{
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// When not transmitting, DO indicates whether busy or not
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if (receiving)
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{
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if (busyCycles > 0) // simulate programming delay
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{
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--busyCycles;
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return 0; // busy
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}
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else
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return 1; // ready to accept new command
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}
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// Transmit data
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return DO;
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}
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void C93C46::Clear(void)
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{
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memset(regs, 0xFF, sizeof(regs));
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}
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void C93C46::Reset(void)
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{
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receiving = true;
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locked = true;
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bitBufferIn = 0;
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bitBufferOut = 0;
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addr = 0;
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busyCycles = 0;
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CS = 0;
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}
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/******************************************************************************
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Configuration, Initialization, and Shutdown
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******************************************************************************/
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void C93C46::Init(void)
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{
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// this function really only exists for consistency with other device classes
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}
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C93C46::C93C46(void)
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{
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memset(regs, 0xFF, sizeof(regs));
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DebugLog("Built 93C46 EEPROM\n");
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}
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C93C46::~C93C46(void)
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{
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DebugLog("Destroyed 93C46 EEPROM\n");
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}
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