mirror of
https://github.com/RetroDECK/Supermodel.git
synced 2024-11-23 06:15:37 +00:00
554 lines
14 KiB
C++
554 lines
14 KiB
C++
/**
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** Supermodel
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** A Sega Model 3 Arcade Emulator.
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** Copyright 2011 Bart Trzynadlowski, Nik Henson
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**
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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** the terms of the GNU General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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** Supermodel is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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** more details.
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**
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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/*
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* PPCDebug.cpp
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*/
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#ifdef SUPERMODEL_DEBUGGER
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#include "PPCDebug.h"
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#include "CPU/PowerPC/ppc.h"
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#include "CPU/PowerPC/PPCDisasm.h"
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#include <cctype>
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#include <string>
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#define M_AA 0x00000002
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#define M_LK 0x00000001
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#define M_BO 0x03E00000
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#define M_BD 0x0000FFFC
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#define M_LI 0x03FFFFFC
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#define MSR_IP 0x00000040
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namespace Debugger
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{
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static UINT32 GetSpecialReg(CCPUDebug *cpu, unsigned id)
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{
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switch (id)
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{
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case PPCSPECIAL_LR: return ::ppc_get_lr();
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case PPCSPECIAL_FPSCR: return 0; // TODO
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case PPCSPECIAL_MSR: return ::ppc_read_msr();
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default: return 0;
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}
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}
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static bool SetSpecialReg(CCPUDebug *cpu, unsigned id, UINT32 data)
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{
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switch (id)
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{
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case PPCSPECIAL_LR: /* TODO */ return false;
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case PPCSPECIAL_FPSCR: /* TODO */ return false;
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default: return false;
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}
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}
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static UINT8 GetCR(CCPUDebug *cpu, unsigned id)
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{
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return ::ppc_get_cr(id);
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}
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static bool SetCR(CCPUDebug *cpu, unsigned id, UINT8 data)
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{
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::ppc_set_cr(id, data);
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return true;
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}
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static UINT32 GetSPR(CCPUDebug *cpu, unsigned id)
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{
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return ::ppc_read_spr(id);
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}
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static bool SetSPR(CCPUDebug *cpu, unsigned id, UINT32 data)
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{
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::ppc_write_spr(id, data);
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return true;
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}
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static UINT32 GetGPR(CCPUDebug *cpu, unsigned id)
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{
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return ::ppc_get_gpr(id);
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}
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static bool SetGPR(CCPUDebug *cpu, unsigned id, UINT32 data)
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{
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::ppc_set_gpr(id, data);
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return true;
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}
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static double GetFPR(CCPUDebug *cpu, unsigned id)
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{
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return ::ppc_get_fpr(id);
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}
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static bool SetFPR(CCPUDebug *cpu, unsigned id, double data)
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{
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::ppc_set_fpr(id, data);
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return true;
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}
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static const char *srGroup = "Special Registers";
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static const char *crGroup = "Condition Registers";
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static const char *grGroup = "GPR Registers";
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static const char *frGroup = "FPR Registers";
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CPPCDebug::CPPCDebug(const char *name) : CCPUDebug("PPC", name, 4, 4, true, 32, 7), m_irqState(0)
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{
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// PC & Link registers
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AddPCRegister ("pc", srGroup);
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AddAddrRegister("lr", srGroup, PPCSPECIAL_LR, GetSpecialReg, SetSpecialReg);
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// SPR registers
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AddInt32Register ("ctr", srGroup, SPR_LR, GetSPR, SetSPR);
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AddInt32Register ("xer", srGroup, SPR_XER, GetSPR, SetSPR);
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//AddStatus32Register("xer", srGroup, SPR_XER, "SOC", GetSPR, SetSPR); //TODO: bit mapping is wrong
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AddInt32Register ("srr0", srGroup, SPR_SRR0, GetSPR, SetSPR);
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AddInt32Register ("srr1", srGroup, SPR_SRR1, GetSPR, SetSPR);
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AddInt32Register ("msr", srGroup, PPCSPECIAL_MSR, GetSpecialReg, SetSpecialReg);
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AddInt32Register ("sdr1", srGroup, SPR603E_SDR1, GetSPR, SetSPR);
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AddInt32Register ("imiss",srGroup, SPR603E_IMISS, GetSPR, SetSPR);
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AddInt32Register ("dmiss",srGroup, SPR603E_DMISS, GetSPR, SetSPR);
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AddInt32Register ("hid0", srGroup, SPR603E_HID0, GetSPR, SetSPR);
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AddInt32Register ("hid1", srGroup, SPR603E_HID1, GetSPR, SetSPR);
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// etc...
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// Condition registers
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for (unsigned id = 0; id < 8; id++)
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{
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sprintf(m_crNames[id], "cr%u", id);
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AddStatus8Register(m_crNames[id], crGroup, id, "<>=O", GetCR, SetCR);
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}
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//AddStatus16Register("fpscr", "Condition Registers", PPCSPECIAL_FPSCR, "FEVOUZX789ABCRI 0123", GetSpecial, SetSpecial);
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// GPR registers
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for (unsigned id = 0; id < 32; id++)
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{
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sprintf(m_gprNames[id], "r%u", id);
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AddInt32Register(m_gprNames[id], grGroup, id, GetGPR, SetGPR);
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}
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// FPR registers
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for (unsigned id = 0; id < 32; id++)
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{
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sprintf(m_fprNames[id], "f%u", id);
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AddFPointRegister(m_fprNames[id], frGroup, id, GetFPR, SetFPR);
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}
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// Exceptions
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AddException("IRQ", EXCEPTION_IRQ, "External Interrupt");
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AddException("DEC", EXCEPTION_DECREMENTER, "Decrement Overflow");
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AddException("TRAP", EXCEPTION_TRAP, "Program Exception/Trap");
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AddException("SYSCALL", EXCEPTION_SYSTEM_CALL, "System Call");
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AddException("SMI", EXCEPTION_SMI, "SMI");
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AddException("DSI", EXCEPTION_DSI, "DSI");
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AddException("ISI", EXCEPTION_ISI, "ISI");
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}
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CPPCDebug::~CPPCDebug()
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{
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DetachFromCPU();
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}
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void CPPCDebug::AttachToCPU()
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{
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::ppc_attach_debugger(this);
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}
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::IBus *CPPCDebug::AttachBus(::IBus *bus)
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{
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m_bus = bus;
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return this;
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}
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void CPPCDebug::DetachFromCPU()
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{
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::ppc_detach_debugger();
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}
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::IBus *CPPCDebug::DetachBus()
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{
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::IBus *bus = m_bus;
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m_bus = NULL;
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return bus;
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}
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UINT32 CPPCDebug::GetResetAddr()
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{
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// Reset address appears to be hardcoded to 0xFFF00100
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return 0xFFF00100;
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}
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bool CPPCDebug::UpdatePC(UINT32 pc)
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{
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::ppc_set_pc(pc);
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return true;
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}
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bool CPPCDebug::ForceException(CException *ex)
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{
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// TODO - no way to force exceptions
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return false;
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}
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bool CPPCDebug::ForceInterrupt(CInterrupt *in)
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{
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if (in->code > 7)
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return false;
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UINT8 irqState = m_bus->Read8(0xF0100018) | 1<<in->code;
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m_bus->Write8(0xF0100018, irqState);
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::ppc_set_irq_line(1); // TODO - what is irqline arg for? not actually used?
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return true;
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}
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UINT64 CPPCDebug::ReadMem(UINT32 addr, unsigned dataSize)
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{
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switch (dataSize)
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{
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case 1: return (UINT64)m_bus->Read8(addr);
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case 2: return (UINT64)m_bus->Read16(addr);
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case 4: return (UINT64)m_bus->Read32(addr);
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case 8: return m_bus->Read64(addr);
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default: return 0;
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}
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}
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bool CPPCDebug::WriteMem(UINT32 addr, unsigned dataSize, UINT64 data)
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{
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switch (dataSize)
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{
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case 1: m_bus->Write8(addr, (UINT8)data); return true;
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case 2: m_bus->Write16(addr, (UINT16)data); return true;
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case 4: m_bus->Write32(addr, (UINT32)data); return true;
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case 8: m_bus->Write64(addr, data); return true;
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default: return false;
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}
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}
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void CPPCDebug::CheckException(UINT16 exCode)
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{
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CCPUDebug::CPUException(exCode);
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if (exCode == EXCEPTION_IRQ)
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{
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UINT8 irqState = m_bus->Read8(0xF0100018); // TODO - replace this with function pointer
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UINT8 newIRQs = (irqState^m_irqState)&irqState;
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for (int intCode = 0; newIRQs && intCode < 8; intCode++)
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{
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if (newIRQs&0x01)
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CPUInterrupt(intCode);
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newIRQs >>= 1;
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}
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m_irqState = irqState;
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}
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}
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int CPPCDebug::Disassemble(UINT32 addr, char *mnemonic, char *operands)
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{
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char opStr[255];
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char valStr[40];
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UINT32 opcode = m_bus->Read32(addr);
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operands[0] = '\0';
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if (!::DisassemblePowerPC(opcode, addr, mnemonic, opStr, true))
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{
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char *o = opStr;
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char *s = strstr(o, "0x");
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while (s)
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{
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strncpy(operands, o, s - o);
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operands[s - o] = '\0';
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s += 2;
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char *p = s;
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unsigned len = 0;
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UINT64 data = 0;
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while (p)
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{
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char c = toupper(*(p++));
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if (c >= '0' && c <= '9')
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{
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data <<= 4;
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data += (UINT64)(c - '0');
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}
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else if (c >= 'A' && c <= 'F')
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{
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data <<= 4;
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data += (UINT64)(10 + c - 'A');
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}
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else
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break;
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len++;
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}
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unsigned dataSize = (p - s) / 2;
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if (dataSize == (unsigned)(memBusWidth / 8))
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{
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EOpFlags opFlags = GetOpFlags(addr, opcode);
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FormatJumpAddress(valStr, (UINT32)data, opFlags);
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}
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else
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FormatData(valStr, dataSize, data);
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strcat(operands, valStr);
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operands += strlen(operands);
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o = p - 1;
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s = strstr(o, "0x");
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}
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strcat(operands, o);
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return 4;
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}
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else
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return -4;
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}
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EOpFlags CPPCDebug::GetOpFlags(UINT32 addr, UINT32 opcode)
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{
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EOpFlags opFlags;
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UINT32 op = opcode>>26;
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if (op == 0x10)
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{
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// Instruction is branch conditional: bc, bca, bcl or bcla
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UINT32 bo = (opcode&M_BO)>>21;
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if (opcode&M_LK)
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{
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if (opcode&M_AA)
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opFlags = JumpSub; // bcla
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else if (bo&0x04)
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opFlags = (EOpFlags)(JumpSub | Relative); // bcl without counter
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else
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opFlags = (EOpFlags)(JumpSub | Relative); // bcl with counter
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}
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else
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{
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if (opcode&M_AA)
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opFlags = JumpSimple; // bca
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else if (bo&0x04)
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opFlags = (EOpFlags)(JumpSimple | Relative); // bc without counter
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else
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opFlags = (EOpFlags)(JumpLoop | Relative); // bc with counter
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}
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// Check BO is not just branch always
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return ((bo&0x14) == 0x14 ? opFlags : (EOpFlags)(opFlags | Conditional));
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}
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else if (op == 0x12)
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{
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// Instruction is branch: b, ba, bl or bla
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if (opcode&M_LK)
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{
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if (opcode&M_AA)
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return JumpSub; // bla
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else
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return (EOpFlags)(JumpSub | Relative); // bl
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}
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else
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{
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if (opcode&M_AA)
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return JumpSimple; // ba
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else
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return (EOpFlags)(JumpSimple | Relative); // b
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}
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}
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else if (op == 0x13)
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{
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UINT32 exOp = (opcode>>1)&0x3ff;
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UINT32 bo = (opcode&M_BO)>>21;
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if (exOp == 0x0210)
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{
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// Instruction is branch conditional to count register: bcctr or bcctrl
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if (opcode&M_LK)
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opFlags = (EOpFlags)(JumpSub | Relative); // bcctrl
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else if (bo&0x04)
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opFlags = (EOpFlags)(JumpSimple | Relative); // bcctr without counter
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else
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opFlags = (EOpFlags)(JumpLoop | Relative); // bcctr with counter
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// Check BO is not just branch always
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return ((bo&0x14) == 0x14 ? opFlags : (EOpFlags)(opFlags | Conditional));
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}
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else if (exOp == 0x0010)
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{
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// Instruction is branch conditional to link register: bclr or bclrl
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if (opcode&M_LK)
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opFlags = (EOpFlags)(JumpSub | ReturnSub); // bclrl
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else
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opFlags = ReturnSub; // bclr
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// Check BO is not just branch always
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return ((bo&0x14) == 0x14 ? opFlags : (EOpFlags)(opFlags | Conditional));
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}
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else if (exOp == 0x0032)
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{
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// Instruction is return from interrupt: rfi
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return ReturnEx;
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}
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// TODO - traps etc
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}
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return NormalOp;
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}
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bool CPPCDebug::GetJumpAddr(UINT32 addr, UINT32 opcode, UINT32 &jumpAddr)
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{
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// Check instruction is one of following branches: b, ba, bl, bla, bc, bca, bcl or bcla
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UINT32 disp;
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UINT32 op = opcode>>26;
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if (op == 0x10)
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{
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// Instruction is b, ba, bl or bla, so calculate branch displacement
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disp = ((opcode&M_BD)>>2) * 4;
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if (disp & 0x00008000)
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disp |= 0xFFFF0000; // Sign extended
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if (opcode&M_AA)
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jumpAddr = disp; // ba or bla
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else
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jumpAddr = addr + disp; // b or bl
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return true;
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}
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else if (op == 0x12)
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{
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// Instruction is bc, bca, bcl or bcla, so calculate branch displacement
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disp = ((opcode&M_LI) >> 2) * 4;
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if (disp & 0x02000000)
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disp |= 0xFC000000; // Sign extended
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if (opcode&M_AA)
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jumpAddr = disp; // bca or bcla
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else
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jumpAddr = addr + disp; // bc or bcl
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return true;
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}
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return false;
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}
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bool CPPCDebug::GetJumpRetAddr(UINT32 addr, UINT32 opcode, UINT32 &retAddr)
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{
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UINT32 op = opcode>>26;
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if ((op == 0x10 || op == 0x12) && (opcode&M_LK))
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{
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// Instruction is bl, bla, bcl or bcla (TODO - add bclrl?)
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retAddr = addr + 4;
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return true;
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}
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return false;
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}
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bool CPPCDebug::GetReturnAddr(UINT32 addr, UINT32 opcode, UINT32 &retAddr)
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{
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// Check instruction is one of following: bclr, bclrl or rfi
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if ((opcode>>26) != 0x13)
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return false;
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UINT32 exOp = (opcode>>1)&0x3ff;
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if (exOp == 0x0010)
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{
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// For bclr and blclr, return address is in link register
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retAddr = ::ppc_get_lr();
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return true;
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}
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else if (exOp == 0x0032)
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{
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// For rfi, return address is in SRR0
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retAddr = ::ppc_read_spr(SPR_SRR0);
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return true;
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}
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return false;
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}
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bool CPPCDebug::GetHandlerAddr(CException *ex, UINT32 &handlerAddr)
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{
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UINT32 msr = ::ppc_read_msr();
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UINT32 base = (msr&MSR_IP ? 0xFFF00000 : 0x00000000);
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switch (ex->code)
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{
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case EXCEPTION_DSI: handlerAddr = base + 0x0300; return true;
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case EXCEPTION_ISI: handlerAddr = base + 0x0400; return true;
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case EXCEPTION_IRQ: handlerAddr = base + 0x0500; return true;
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case EXCEPTION_TRAP: handlerAddr = base + 0x0700; return true;
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case EXCEPTION_DECREMENTER: handlerAddr = base + 0x0900; return true;
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case EXCEPTION_SYSTEM_CALL: handlerAddr = base + 0x0C00; return true;
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case EXCEPTION_SMI: handlerAddr = base + 0x1400; return true;
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default: return false;
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}
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}
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bool CPPCDebug::GetHandlerAddr(CInterrupt *in, UINT32 &handlerAddr)
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{
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UINT32 msr = ::ppc_read_msr();
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handlerAddr = (msr&MSR_IP ? 0xFFF00500 : 0x00000500);
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return true;
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}
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// IBus methods
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UINT8 CPPCDebug::Read8(UINT32 addr)
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{
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UINT8 data = m_bus->Read8(addr);
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CheckRead8(addr, data);
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return data;
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}
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UINT16 CPPCDebug::Read16(UINT32 addr)
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{
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UINT16 data = m_bus->Read16(addr);
|
|
CheckRead16(addr, data);
|
|
return data;
|
|
}
|
|
|
|
UINT32 CPPCDebug::Read32(UINT32 addr)
|
|
{
|
|
UINT32 data = m_bus->Read32(addr);
|
|
CheckRead32(addr, data);
|
|
return data;
|
|
}
|
|
|
|
UINT64 CPPCDebug::Read64(UINT32 addr)
|
|
{
|
|
UINT64 data = m_bus->Read64(addr);
|
|
CheckRead64(addr, data);
|
|
return data;
|
|
}
|
|
|
|
void CPPCDebug::Write8(UINT32 addr, UINT8 data)
|
|
{
|
|
m_bus->Write8(addr, data);
|
|
CheckWrite8(addr, data);
|
|
}
|
|
|
|
void CPPCDebug::Write16(UINT32 addr, UINT16 data)
|
|
{
|
|
m_bus->Write16(addr, data);
|
|
CheckWrite16(addr, data);
|
|
}
|
|
|
|
void CPPCDebug::Write32(UINT32 addr, UINT32 data)
|
|
{
|
|
m_bus->Write32(addr, data);
|
|
CheckWrite32(addr, data);
|
|
}
|
|
|
|
void CPPCDebug::Write64(UINT32 addr, UINT64 data)
|
|
{
|
|
m_bus->Write64(addr, data);
|
|
CheckWrite64(addr, data);
|
|
}
|
|
}
|
|
|
|
#endif // SUPERMODEL_DEBUGGER
|