mirror of
https://github.com/RetroDECK/Supermodel.git
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e93c5d710f
PowerPC no longer clears its own IRQ line; it is now cleared by the IRQ controller when there are no more pending interrupts. Not all games clear DMA interrupts so it was necessary to tweak the 53C810 SCSI controller and the Real3D DMA interface to only fire interrupts if a certain register is correctly set. 53C810 has the documented DIEN (DMA Interrupt Enable) register; Real3D DMA seems to use the low bit of the dmaConfig register. Also I removed the net IRQ as no games seem to actually use it.
129 lines
3.3 KiB
C++
129 lines
3.3 KiB
C++
/**
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** Supermodel
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** A Sega Model 3 Arcade Emulator.
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** Copyright 2011 Bart Trzynadlowski, Nik Henson
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**
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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** the terms of the GNU General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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** Supermodel is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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** more details.
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**
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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/*
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* IRQ.cpp
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*
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* Model 3 IRQ controller. Implementation of the CIRQ class.
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*
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* To-Do List:
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* -----------
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* - When a proper OO CPU core is added, the CPU object should be hooked to the
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* IRQ controller to assert/deassert the PowerPC IRQ line. Right now, we just
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* call the PPC core directly, which should not happen in proper OO code.
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*/
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#include "IRQ.h"
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#include "Supermodel.h"
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#include "CPU/PowerPC/ppc.h"
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/******************************************************************************
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Save States
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******************************************************************************/
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void CIRQ::SaveState(CBlockFile *SaveState)
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{
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SaveState->NewBlock("IRQ", __FILE__);
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SaveState->Write(&irqEnable, sizeof(irqEnable));
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SaveState->Write(&irqState, sizeof(irqState));
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}
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void CIRQ::LoadState(CBlockFile *SaveState)
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{
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if (OKAY != SaveState->FindBlock("IRQ"))
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{
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ErrorLog("Unable to load IRQ controller state. Save state file is corrupt.");
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return;
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}
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SaveState->Read(&irqEnable, sizeof(irqEnable));
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SaveState->Read(&irqState, sizeof(irqState));
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}
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/******************************************************************************
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Emulation Functions
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******************************************************************************/
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void CIRQ::Assert(unsigned irqBits)
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{
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irqState |= irqBits;
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if ((irqState&irqEnable)) // low 8 bits are maskable interrupts
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ppc_set_irq_line(1);
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if ((irqState&(~0xFF))) // any non-maskable interrupts pending?
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ppc_set_irq_line(1);
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}
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void CIRQ::Deassert(unsigned irqBits)
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{
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irqState &= ~irqBits;
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if (!(irqState & irqEnable) && !(irqState & (~0xFF)))
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ppc_set_irq_line(0); // if no pending IRQs, deassert CPU IRQ line
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}
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void CIRQ::WriteIRQEnable(UINT8 data)
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{
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irqEnable = (unsigned) data;
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}
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UINT8 CIRQ::ReadIRQEnable(void)
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{
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return (UINT8) (irqEnable&0xFF);
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}
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UINT8 CIRQ::ReadIRQState(void)
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{
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return (UINT8) (irqState&0xFF);
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}
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void CIRQ::Reset(void)
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{
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irqEnable = 0; // disable all
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irqState = 0; // no IRQs pending
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}
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/******************************************************************************
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Configuration, Initialization, and Shutdown
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******************************************************************************/
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void CIRQ::Init(void)
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{
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// this function really only exists for consistency with other device classes
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}
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CIRQ::CIRQ(void)
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{
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DebugLog("Built IRQ controller\n");
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}
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/*
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* CIRQ::~CIRQ(void):
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*
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* Destructor.
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*/
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CIRQ::~CIRQ(void)
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{
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DebugLog("Destroyed IRQ controller\n");
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}
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