Duckstation/src/core/pad.cpp

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#include "pad.h"
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#include "common/log.h"
#include "common/state_wrapper.h"
#include "controller.h"
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#include "host_interface.h"
#include "interrupt_controller.h"
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#include "memory_card.h"
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#include "system.h"
Log_SetChannel(Pad);
Pad::Pad() = default;
Pad::~Pad() = default;
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void Pad::Initialize(System* system, InterruptController* interrupt_controller)
{
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m_system = system;
m_interrupt_controller = interrupt_controller;
m_transfer_event = system->CreateTimingEvent("Pad Serial Transfer", 1, 1,
std::bind(&Pad::TransferEvent, this, std::placeholders::_2), false);
}
void Pad::Reset()
{
SoftReset();
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for (u32 i = 0; i < NUM_SLOTS; i++)
{
if (m_controllers[i])
m_controllers[i]->Reset();
if (m_memory_cards[i])
m_memory_cards[i]->Reset();
}
}
bool Pad::DoState(StateWrapper& sw)
{
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for (u32 i = 0; i < NUM_SLOTS; i++)
{
ControllerType controller_type = m_controllers[i] ? m_controllers[i]->GetType() : ControllerType::None;
ControllerType state_controller_type = controller_type;
sw.Do(&state_controller_type);
if (controller_type != state_controller_type)
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{
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m_system->GetHostInterface()->AddFormattedOSDMessage(
2.0f, "Save state contains controller type %s in port %u, but %s is used. Switching.",
Settings::GetControllerTypeName(state_controller_type), i, Settings::GetControllerTypeName(controller_type));
m_controllers[i].reset();
if (state_controller_type != ControllerType::None)
m_controllers[i] = Controller::Create(state_controller_type);
}
if (m_controllers[i])
{
if (!sw.DoMarker("Controller") || !m_controllers[i]->DoState(sw))
return false;
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}
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bool card_present = static_cast<bool>(m_memory_cards[i]);
sw.Do(&card_present);
if (card_present && !m_memory_cards[i])
{
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m_system->GetHostInterface()->AddFormattedOSDMessage(
2.0f, "Memory card %c present in save state but not in system. Creating temporary card.", 'A' + i);
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m_memory_cards[i] = MemoryCard::Create(m_system);
}
else if (!card_present && m_memory_cards[i])
{
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m_system->GetHostInterface()->AddFormattedOSDMessage(
2.0f, "Memory card %u present system but not save state. Removing card.", 'A' + i);
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m_memory_cards[i].reset();
}
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if (m_memory_cards[i])
{
if (!sw.DoMarker("MemoryCard") || !m_memory_cards[i]->DoState(sw))
return false;
}
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}
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sw.Do(&m_state);
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sw.Do(&m_JOY_CTRL.bits);
sw.Do(&m_JOY_STAT.bits);
sw.Do(&m_JOY_MODE.bits);
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sw.Do(&m_JOY_BAUD);
sw.Do(&m_receive_buffer);
sw.Do(&m_transmit_buffer);
sw.Do(&m_receive_buffer_full);
sw.Do(&m_transmit_buffer_full);
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if (sw.IsReading() && IsTransmitting())
m_transfer_event->Activate();
return !sw.HasError();
}
void Pad::SetController(u32 slot, std::unique_ptr<Controller> dev)
{
m_controllers[slot] = std::move(dev);
}
void Pad::SetMemoryCard(u32 slot, std::unique_ptr<MemoryCard> dev)
{
m_memory_cards[slot] = std::move(dev);
}
u32 Pad::ReadRegister(u32 offset)
{
switch (offset)
{
case 0x00: // JOY_DATA
{
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const u8 value = m_receive_buffer_full ? m_receive_buffer : 0xFF;
Log_DebugPrintf("JOY_DATA (R) -> 0x%02X%s", ZeroExtend32(value), m_receive_buffer_full ? "" : "(EMPTY)");
m_receive_buffer_full = false;
UpdateJoyStat();
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return (ZeroExtend32(value) | (ZeroExtend32(value) << 8) | (ZeroExtend32(value) << 16) |
(ZeroExtend32(value) << 24));
}
case 0x04: // JOY_STAT
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{
const u32 bits = m_JOY_STAT.bits;
m_JOY_STAT.ACKINPUT = false;
return bits;
}
case 0x08: // JOY_MODE
return ZeroExtend32(m_JOY_MODE.bits);
case 0x0A: // JOY_CTRL
return ZeroExtend32(m_JOY_CTRL.bits);
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case 0x0E: // JOY_BAUD
return ZeroExtend32(m_JOY_BAUD);
default:
Log_ErrorPrintf("Unknown register read: 0x%X", offset);
return UINT32_C(0xFFFFFFFF);
}
}
void Pad::WriteRegister(u32 offset, u32 value)
{
switch (offset)
{
case 0x00: // JOY_DATA
{
Log_DebugPrintf("JOY_DATA (W) <- 0x%02X", value);
if (m_transmit_buffer_full)
Log_WarningPrint("TX FIFO overrun");
m_transmit_buffer = Truncate8(value);
m_transmit_buffer_full = true;
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if (!IsTransmitting() && CanTransfer())
BeginTransfer();
return;
}
case 0x0A: // JOY_CTRL
{
Log_DebugPrintf("JOY_CTRL <- 0x%04X", value);
m_JOY_CTRL.bits = Truncate16(value);
if (m_JOY_CTRL.RESET)
SoftReset();
if (m_JOY_CTRL.ACK)
{
// reset stat bits
m_JOY_STAT.INTR = false;
}
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if (!m_JOY_CTRL.SELECT)
ResetDeviceTransferState();
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if (!m_JOY_CTRL.SELECT || !m_JOY_CTRL.TXEN)
{
if (IsTransmitting())
EndTransfer();
}
else
{
if (!IsTransmitting() && CanTransfer())
BeginTransfer();
}
UpdateJoyStat();
return;
}
case 0x08: // JOY_MODE
{
Log_DebugPrintf("JOY_MODE <- 0x%08X", value);
m_JOY_MODE.bits = Truncate16(value);
return;
}
case 0x0E:
{
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Log_DebugPrintf("JOY_BAUD <- 0x%08X", value);
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m_JOY_BAUD = Truncate16(value);
return;
}
default:
Log_ErrorPrintf("Unknown register write: 0x%X <- 0x%08X", offset, value);
return;
}
}
void Pad::SoftReset()
{
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if (IsTransmitting())
EndTransfer();
m_JOY_CTRL.bits = 0;
m_JOY_STAT.bits = 0;
m_JOY_MODE.bits = 0;
m_receive_buffer = 0;
m_receive_buffer_full = false;
m_transmit_buffer = 0;
m_transmit_buffer_full = false;
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ResetDeviceTransferState();
UpdateJoyStat();
}
void Pad::UpdateJoyStat()
{
m_JOY_STAT.RXFIFONEMPTY = m_receive_buffer_full;
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m_JOY_STAT.TXDONE = !m_transmit_buffer_full && m_state != State::Transmitting;
m_JOY_STAT.TXRDY = !m_transmit_buffer_full;
}
void Pad::TransferEvent(TickCount ticks_late)
{
if (m_state == State::Transmitting)
DoTransfer(ticks_late);
else
DoACK();
}
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void Pad::BeginTransfer()
{
DebugAssert(m_state == State::Idle && CanTransfer());
Log_DebugPrintf("Starting transfer");
m_JOY_CTRL.RXEN = true;
m_transmit_value = m_transmit_buffer;
m_transmit_buffer_full = false;
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// The transfer or the interrupt must be delayed, otherwise the BIOS thinks there's no device detected.
// It seems to do something resembling the following:
// 1) Sets the control register up for transmitting, interrupt on ACK.
// 2) Writes 0x01 to the TX FIFO.
// 3) Delays for a bit.
// 4) Writes ACK to the control register, clearing the interrupt flag.
// 5) Clears IRQ7 in the interrupt controller.
// 6) Waits until the RX FIFO is not empty, reads the first byte to $zero.
// 7) Checks if the interrupt status register had IRQ7 set. If not, no device connected.
//
// Performing the transfer immediately will result in both the INTR bit and the bit in the interrupt
// controller being discarded in (4)/(5), but this bit was set by the *new* transfer. Therefore, the
// test in (7) will fail, and it won't send any more data. So, the transfer/interrupt must be delayed
// until after (4) and (5) have been completed.
m_state = State::Transmitting;
m_transfer_event->SetPeriodAndSchedule(GetTransferTicks());
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}
void Pad::DoTransfer(TickCount ticks_late)
{
Log_DebugPrintf("Transferring slot %d", m_JOY_CTRL.SLOT.GetValue());
Controller* const controller = m_controllers[m_JOY_CTRL.SLOT].get();
MemoryCard* const memory_card = m_memory_cards[m_JOY_CTRL.SLOT].get();
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// set rx?
m_JOY_CTRL.RXEN = true;
const u8 data_out = m_transmit_value;
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u8 data_in = 0xFF;
bool ack = false;
switch (m_active_device)
{
case ActiveDevice::None:
{
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if (!controller || (ack = controller->Transfer(data_out, &data_in)) == false)
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{
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if (!memory_card || (ack = memory_card->Transfer(data_out, &data_in)) == false)
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{
// nothing connected to this port
Log_TracePrintf("Nothing connected or ACK'ed");
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}
else
{
// memory card responded, make it the active device until non-ack
Log_TracePrintf("Transfer to memory card, data_out=0x%02X, data_in=0x%02X", data_out, data_in);
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m_active_device = ActiveDevice::MemoryCard;
}
}
else
{
// controller responded, make it the active device until non-ack
Log_TracePrintf("Transfer to controller, data_out=0x%02X, data_in=0x%02X", data_out, data_in);
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m_active_device = ActiveDevice::Controller;
}
}
break;
case ActiveDevice::Controller:
{
if (controller)
{
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ack = controller->Transfer(data_out, &data_in);
Log_TracePrintf("Transfer to controller, data_out=0x%02X, data_in=0x%02X", data_out, data_in);
}
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}
break;
case ActiveDevice::MemoryCard:
{
if (memory_card)
{
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ack = memory_card->Transfer(data_out, &data_in);
Log_TracePrintf("Transfer to memory card, data_out=0x%02X, data_in=0x%02X", data_out, data_in);
}
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}
break;
}
m_receive_buffer = data_in;
m_receive_buffer_full = true;
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// device no longer active?
if (!ack)
{
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m_active_device = ActiveDevice::None;
EndTransfer();
}
else
{
const TickCount ack_timer = GetACKTicks();
Log_DebugPrintf("Delaying ACK for %d ticks", ack_timer);
m_state = State::WaitingForACK;
if (ticks_late >= ack_timer)
DoACK();
else
m_transfer_event->SetPeriodAndSchedule(ack_timer - ticks_late);
}
UpdateJoyStat();
}
void Pad::DoACK()
{
m_JOY_STAT.ACKINPUT = true;
if (m_JOY_CTRL.ACKINTEN)
{
Log_DebugPrintf("Triggering ACK interrupt");
m_JOY_STAT.INTR = true;
m_interrupt_controller->InterruptRequest(InterruptController::IRQ::IRQ7);
}
EndTransfer();
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UpdateJoyStat();
if (CanTransfer())
BeginTransfer();
}
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void Pad::EndTransfer()
{
DebugAssert(m_state == State::Transmitting || m_state == State::WaitingForACK);
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Log_DebugPrintf("Ending transfer");
m_state = State::Idle;
m_transfer_event->Deactivate();
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}
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void Pad::ResetDeviceTransferState()
{
for (u32 i = 0; i < NUM_SLOTS; i++)
{
if (m_controllers[i])
m_controllers[i]->ResetTransferState();
if (m_memory_cards[i])
m_memory_cards[i]->ResetTransferState();
m_active_device = ActiveDevice::None;
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}
}