Xargon/Duckstation
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621 commits 1 branch 1 tag 100 MiB
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21 commits

Author SHA1 Message Date
Connor McLaughlin a6dab97928 CPU: Simplify GTE register addressing 2019-12-11 21:44:26 +10:00
Connor McLaughlin eeea5125f7 CPU: Use pending ticks as downcount comparison 
Saves a few cycles decrementing the downcount.
 2019-12-05 16:28:46 +10:00
Connor McLaughlin aec01d3890 Bus: Reduce RAM write delay 2019-11-27 00:01:47 +10:00
Connor McLaughlin 8c5fcc8f48 CPU: Fix more load delay slot issues 
Fixes Spyro again. b{ltz,gez}(al)? disabled in the recompiler until
issues are fixed.
 2019-11-24 01:11:51 +10:00
Connor McLaughlin 201be8aa9c CPU: Fix interpreter speed regression from recompiler 
Seems the logging prevented ExecuteInstruction() from being inlined.
 2019-11-23 19:49:44 +10:00
Connor McLaughlin 7b0978119b CPU: Only write exceptions to log when logging 2019-11-22 17:54:06 +10:00
Connor McLaughlin e5c0d28fdc CPU/Recompiler: Implement mfhi/mthi/mflo/mtlo 2019-11-22 10:53:54 +10:00
Connor McLaughlin 330d512831 CPU: Write exceptions to trace log 2019-11-22 10:53:15 +10:00
Connor McLaughlin 7aafaeacbc CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions 
Currently not passing CPU tests when combined with lwl/lwr.
 2019-11-21 23:34:04 +10:00
Connor McLaughlin 5217088d82 CPU: Refactor load delay handling 
Now works when mixing interpreter and recompiler code.
 2019-11-20 00:15:15 +10:00
Connor McLaughlin 1d6c4a3af1 CPU: Basic recompiler implementation for x64 (lui, ori, addiu) 
Disabled by default.
 2019-11-19 20:38:05 +10:00
Connor McLaughlin 19062e11b5 Revert "Bus: Relax memory timing" 
This reverts commit b5c799ba81.
 2019-11-17 22:11:16 +10:00
Connor McLaughlin b5c799ba81 Bus: Relax memory timing 
Formulas from Mednafen.
 2019-11-17 01:47:46 +10:00
Connor McLaughlin 6f4cf7d5e3 System: Support changing BIOS path 2019-11-11 19:43:39 +10:00
Connor McLaughlin 4a6f283484 CPU: Add trace log to file support 2019-11-04 00:55:07 +10:00
Connor McLaughlin a9e0fe6db2 cpu: Remove superfluous logging for syscall 2019-10-26 15:39:10 +10:00
Connor McLaughlin a76ec6fc19 Compile fixes for GCC 2019-10-22 23:07:51 +10:00
Connor McLaughlin b4a6c98bbe CPU: Move alignment check to branch instead of fetch 
There is no other way to end up with an unaligned PC.
 2019-10-13 18:35:21 +10:00
Connor McLaughlin 4422fb0545 CPU: Memory access timings 2019-10-04 20:30:54 +10:00
Connor McLaughlin 1aa846e0f8 CPU: Clean up exception disassembly dumping 2019-10-04 15:35:39 +10:00
Connor McLaughlin bddbab9d60 Rename to DuckStation 2019-10-04 13:54:09 +10:00
Renamed from src/pse/cpu_core.cpp (Browse further)