Commit graph

20 commits

Author SHA1 Message Date
Connor McLaughlin be63d893cd CPU: Use partial icache fills for non-line-aligned addresses 2020-10-30 00:44:40 +10:00
Connor McLaughlin 7566c45f64 CPU/Recompiler: Implement fastmem 2020-10-18 14:54:38 +10:00
Connor McLaughlin 27697d0508 System: Implement CPU overclocking [SAVEVERSION+]
Partial credit to @CookiePLMonster as well.
2020-09-30 23:48:34 +10:00
Connor McLaughlin 19d6037b99 CPU: Implement instruction cache simulation
Implemented for all execution modes. Disabled by default in the cached
interpreter and recompiler, always enabled in the pure interpreter.
2020-08-29 22:07:40 +10:00
Connor McLaughlin 1d5f810a4b CPU/Recompiler: Disable memory access exceptions by default
This means it'll no longer pass amidog's CPU test in the default config.
But no games rely on this. You can enable it in advanced options if you
want to pass the CPU test.
2020-08-08 23:44:13 +10:00
Connor McLaughlin b6f871d2b9
JIT optimizations and refactoring (#675)
* CPU/Recompiler: Use rel32 call where possible for no-args

* JitCodeBuffer: Support using preallocated buffer

* CPU/Recompiler/AArch64: Use bl instead of blr for short branches

* CPU/CodeCache: Allocate recompiler buffer in program space

This means we don't need 64-bit moves for every call out of the
recompiler.

* GTE: Don't store as u16 and load as u32

* CPU/Recompiler: Add methods to emit global load/stores

* GTE: Convert class to namespace

* CPU/Recompiler: Call GTE functions directly

* Settings: Turn into a global variable

* GPU: Replace local pointers with global

* InterruptController: Turn into a global pointer

* System: Replace local pointers with global

* Timers: Turn into a global instance

* DMA: Turn into a global instance

* SPU: Turn into a global instance

* CDROM: Turn into a global instance

* MDEC: Turn into a global instance

* Pad: Turn into a global instance

* SIO: Turn into a global instance

* CDROM: Move audio FIFO to the heap

* CPU/Recompiler: Drop ASMFunctions

No longer needed since we have code in the same 4GB window.

* CPUCodeCache: Turn class into namespace

* Bus: Local pointer -> global pointers

* CPU: Turn class into namespace

* Bus: Turn into namespace

* GTE: Store registers in CPU state struct

Allows relative addressing on ARM.

* CPU/Recompiler: Align code storage to page size

* CPU/Recompiler: Fix relative branches on A64

* HostInterface: Local references to global

* System: Turn into a namespace, move events out

* Add guard pages

* Android: Fix build
2020-07-31 17:09:18 +10:00
Connor McLaughlin 5c1c467e38 GTE: Add widescreen hack 2020-07-18 00:28:37 +10:00
Connor McLaughlin 2d74062abb CPU: Delay interrupts by one instruction/block
Fixes Gameshark Sampler Disc.
2020-07-03 01:51:08 +10:00
Connor McLaughlin 1b9609ef61 Implement event-based scheduler instead of lock-step components 2020-01-24 16:23:39 +10:00
Connor McLaughlin 9fa8eb239e CPU: Force-inline some accessor functions 2019-12-05 23:02:03 +10:00
Connor McLaughlin eeea5125f7 CPU: Use pending ticks as downcount comparison
Saves a few cycles decrementing the downcount.
2019-12-05 16:28:46 +10:00
Connor McLaughlin 8c5fcc8f48 CPU: Fix more load delay slot issues
Fixes Spyro again. b{ltz,gez}(al)? disabled in the recompiler until
issues are fixed.
2019-11-24 01:11:51 +10:00
Connor McLaughlin 7aafaeacbc CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions
Currently not passing CPU tests when combined with lwl/lwr.
2019-11-21 23:34:04 +10:00
Connor McLaughlin 5217088d82 CPU: Refactor load delay handling
Now works when mixing interpreter and recompiler code.
2019-11-20 00:15:15 +10:00
Connor McLaughlin 1d6c4a3af1 CPU: Basic recompiler implementation for x64 (lui, ori, addiu)
Disabled by default.
2019-11-19 20:38:05 +10:00
Connor McLaughlin 6f4cf7d5e3 System: Support changing BIOS path 2019-11-11 19:43:39 +10:00
Connor McLaughlin 4a6f283484 CPU: Add trace log to file support 2019-11-04 00:55:07 +10:00
Connor McLaughlin 9d5f3c1306 CPU: Support stalling CPU for bus activity such as DMA 2019-10-18 00:20:38 +10:00
Connor McLaughlin 4422fb0545 CPU: Memory access timings 2019-10-04 20:30:54 +10:00
Connor McLaughlin bddbab9d60 Rename to DuckStation 2019-10-04 13:54:09 +10:00
Renamed from src/pse/cpu_core.h (Browse further)