Commit graph

28 commits

Author SHA1 Message Date
Connor McLaughlin 0c1b637549 PGXP: Add initial implementation 2020-08-02 00:25:07 +10:00
Connor McLaughlin 2eb9384275 Replace more instances of fopen() with FileSystem::OpenFile() 2020-08-01 14:00:22 +10:00
Connor McLaughlin b6f871d2b9
JIT optimizations and refactoring (#675)
* CPU/Recompiler: Use rel32 call where possible for no-args

* JitCodeBuffer: Support using preallocated buffer

* CPU/Recompiler/AArch64: Use bl instead of blr for short branches

* CPU/CodeCache: Allocate recompiler buffer in program space

This means we don't need 64-bit moves for every call out of the
recompiler.

* GTE: Don't store as u16 and load as u32

* CPU/Recompiler: Add methods to emit global load/stores

* GTE: Convert class to namespace

* CPU/Recompiler: Call GTE functions directly

* Settings: Turn into a global variable

* GPU: Replace local pointers with global

* InterruptController: Turn into a global pointer

* System: Replace local pointers with global

* Timers: Turn into a global instance

* DMA: Turn into a global instance

* SPU: Turn into a global instance

* CDROM: Turn into a global instance

* MDEC: Turn into a global instance

* Pad: Turn into a global instance

* SIO: Turn into a global instance

* CDROM: Move audio FIFO to the heap

* CPU/Recompiler: Drop ASMFunctions

No longer needed since we have code in the same 4GB window.

* CPUCodeCache: Turn class into namespace

* Bus: Local pointer -> global pointers

* CPU: Turn class into namespace

* Bus: Turn into namespace

* GTE: Store registers in CPU state struct

Allows relative addressing on ARM.

* CPU/Recompiler: Align code storage to page size

* CPU/Recompiler: Fix relative branches on A64

* HostInterface: Local references to global

* System: Turn into a namespace, move events out

* Add guard pages

* Android: Fix build
2020-07-31 17:09:18 +10:00
Connor McLaughlin 2d74062abb CPU: Delay interrupts by one instruction/block
Fixes Gameshark Sampler Disc.
2020-07-03 01:51:08 +10:00
Connor McLaughlin a937a09b5c CPU: Fix broken exception logging from YBaseLib removal 2020-05-16 01:02:18 +10:00
Connor McLaughlin 71c1e243fe Remove YBaseLib dependency 2020-01-10 13:40:53 +10:00
Connor McLaughlin dbf651e493 CPU/Interpreter: Remove redundant comparison in divu instruction 2019-12-31 11:41:52 +10:00
Connor McLaughlin a6dab97928 CPU: Simplify GTE register addressing 2019-12-11 21:44:26 +10:00
Connor McLaughlin eeea5125f7 CPU: Use pending ticks as downcount comparison
Saves a few cycles decrementing the downcount.
2019-12-05 16:28:46 +10:00
Connor McLaughlin aec01d3890 Bus: Reduce RAM write delay 2019-11-27 00:01:47 +10:00
Connor McLaughlin 8c5fcc8f48 CPU: Fix more load delay slot issues
Fixes Spyro again. b{ltz,gez}(al)? disabled in the recompiler until
issues are fixed.
2019-11-24 01:11:51 +10:00
Connor McLaughlin 201be8aa9c CPU: Fix interpreter speed regression from recompiler
Seems the logging prevented ExecuteInstruction() from being inlined.
2019-11-23 19:49:44 +10:00
Connor McLaughlin 7b0978119b CPU: Only write exceptions to log when logging 2019-11-22 17:54:06 +10:00
Connor McLaughlin e5c0d28fdc CPU/Recompiler: Implement mfhi/mthi/mflo/mtlo 2019-11-22 10:53:54 +10:00
Connor McLaughlin 330d512831 CPU: Write exceptions to trace log 2019-11-22 10:53:15 +10:00
Connor McLaughlin 7aafaeacbc CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions
Currently not passing CPU tests when combined with lwl/lwr.
2019-11-21 23:34:04 +10:00
Connor McLaughlin 5217088d82 CPU: Refactor load delay handling
Now works when mixing interpreter and recompiler code.
2019-11-20 00:15:15 +10:00
Connor McLaughlin 1d6c4a3af1 CPU: Basic recompiler implementation for x64 (lui, ori, addiu)
Disabled by default.
2019-11-19 20:38:05 +10:00
Connor McLaughlin 19062e11b5 Revert "Bus: Relax memory timing"
This reverts commit b5c799ba81.
2019-11-17 22:11:16 +10:00
Connor McLaughlin b5c799ba81 Bus: Relax memory timing
Formulas from Mednafen.
2019-11-17 01:47:46 +10:00
Connor McLaughlin 6f4cf7d5e3 System: Support changing BIOS path 2019-11-11 19:43:39 +10:00
Connor McLaughlin 4a6f283484 CPU: Add trace log to file support 2019-11-04 00:55:07 +10:00
Connor McLaughlin a9e0fe6db2 cpu: Remove superfluous logging for syscall 2019-10-26 15:39:10 +10:00
Connor McLaughlin a76ec6fc19 Compile fixes for GCC 2019-10-22 23:07:51 +10:00
Connor McLaughlin b4a6c98bbe CPU: Move alignment check to branch instead of fetch
There is no other way to end up with an unaligned PC.
2019-10-13 18:35:21 +10:00
Connor McLaughlin 4422fb0545 CPU: Memory access timings 2019-10-04 20:30:54 +10:00
Connor McLaughlin 1aa846e0f8 CPU: Clean up exception disassembly dumping 2019-10-04 15:35:39 +10:00
Connor McLaughlin bddbab9d60 Rename to DuckStation 2019-10-04 13:54:09 +10:00
Renamed from src/pse/cpu_core.cpp (Browse further)