Commit graph

13 commits

Author SHA1 Message Date
Connor McLaughlin 70767dc6bf CPU/Recompiler/AArch64: Use cmn for negative constant comparisons 2020-08-08 23:44:13 +10:00
Connor McLaughlin 901ca71fdc CPU/Recompiler: Add temporary inhibiting of register allocation 2020-08-08 23:44:13 +10:00
Connor McLaughlin 8d4216068a CPU/Recompiler: Implement div/divu 2020-08-08 23:06:27 +10:00
Connor McLaughlin 71c1e243fe Remove YBaseLib dependency 2020-01-10 13:40:53 +10:00
Connor McLaughlin 29355bc44d CPU/Recompiler: Move branch codegen to base class 2019-12-27 20:38:07 +10:00
Connor McLaughlin aa52dbfeb8 CPU/Recompiler: Use register cache for managing pc
Reduces the number of loadstores after each instruction.
2019-12-12 23:55:23 +10:00
Connor McLaughlin 20c7aaf74b CPU/Recompiler: Support pushing/popping the register cache state 2019-12-12 20:15:54 +10:00
Connor McLaughlin 914abe64c1 CPU/Recompiler: Extend sign for add/sub/cmp immediates in AArch64 2019-12-05 02:02:23 +10:00
Connor McLaughlin 8c5fcc8f48 CPU: Fix more load delay slot issues
Fixes Spyro again. b{ltz,gez}(al)? disabled in the recompiler until
issues are fixed.
2019-11-24 01:11:51 +10:00
Connor McLaughlin f14ad1d3c4 CPU/Recompiler: Implement add/addu/addi 2019-11-23 00:26:56 +10:00
Connor McLaughlin 7aafaeacbc CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions
Currently not passing CPU tests when combined with lwl/lwr.
2019-11-21 23:34:04 +10:00
Connor McLaughlin 5217088d82 CPU: Refactor load delay handling
Now works when mixing interpreter and recompiler code.
2019-11-20 00:15:15 +10:00
Connor McLaughlin 1d6c4a3af1 CPU: Basic recompiler implementation for x64 (lui, ori, addiu)
Disabled by default.
2019-11-19 20:38:05 +10:00