Connor McLaughlin
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29355bc44d
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CPU/Recompiler: Move branch codegen to base class
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2019-12-27 20:38:07 +10:00 |
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Connor McLaughlin
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aa52dbfeb8
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CPU/Recompiler: Use register cache for managing pc
Reduces the number of loadstores after each instruction.
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2019-12-12 23:55:23 +10:00 |
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Connor McLaughlin
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20c7aaf74b
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CPU/Recompiler: Support pushing/popping the register cache state
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2019-12-12 20:15:54 +10:00 |
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Connor McLaughlin
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914abe64c1
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CPU/Recompiler: Extend sign for add/sub/cmp immediates in AArch64
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2019-12-05 02:02:23 +10:00 |
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Connor McLaughlin
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8c5fcc8f48
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CPU: Fix more load delay slot issues
Fixes Spyro again. b{ltz,gez}(al)? disabled in the recompiler until
issues are fixed.
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2019-11-24 01:11:51 +10:00 |
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Connor McLaughlin
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f14ad1d3c4
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CPU/Recompiler: Implement add/addu/addi
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2019-11-23 00:26:56 +10:00 |
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Connor McLaughlin
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7aafaeacbc
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CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions
Currently not passing CPU tests when combined with lwl/lwr.
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2019-11-21 23:34:04 +10:00 |
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Connor McLaughlin
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5217088d82
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CPU: Refactor load delay handling
Now works when mixing interpreter and recompiler code.
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2019-11-20 00:15:15 +10:00 |
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Connor McLaughlin
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1d6c4a3af1
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CPU: Basic recompiler implementation for x64 (lui, ori, addiu)
Disabled by default.
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2019-11-19 20:38:05 +10:00 |
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