Connor McLaughlin
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d58dbe04c0
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CPU: Fix load delay register reads for same register in delay slot
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2019-09-15 12:16:51 +10:00 |
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Connor McLaughlin
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4ca3b4b570
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CPU: Fix alignment exception on register indirect branch
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2019-09-15 01:13:11 +10:00 |
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Connor McLaughlin
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bea727bbe4
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CPU: Fix BGEZAL with rs == ra
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2019-09-15 01:02:35 +10:00 |
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Connor McLaughlin
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2560efbebd
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Save state support
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2019-09-14 20:28:47 +10:00 |
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Connor McLaughlin
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f47d44c151
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CPU: Implement break instruction
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2019-09-14 14:41:41 +10:00 |
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Connor McLaughlin
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32a36ef1bc
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CPU: Implement alignment (memory) exception
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2019-09-14 14:29:23 +10:00 |
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Connor McLaughlin
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ced3038e73
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CPU: Implement sub instruction
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2019-09-14 13:39:36 +10:00 |
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Connor McLaughlin
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1afa02d475
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CPU: Fix overflowed register written back in add instruction
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2019-09-14 13:33:29 +10:00 |
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Connor McLaughlin
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459db392e7
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CPU: Add missing cop0 register reads
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2019-09-14 13:31:44 +10:00 |
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Connor McLaughlin
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9f36384752
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System: Support sideloading EXE files via BIOS patch
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2019-09-14 13:22:34 +10:00 |
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Connor McLaughlin
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27913cd20a
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Partial implementation of DMA controller and GPU stubs
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2019-09-11 14:01:19 +10:00 |
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Connor McLaughlin
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2149ab4d69
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Initial commit
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2019-09-11 14:00:42 +10:00 |
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