2011-07-31 02:37:31 +00:00
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/**
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** Supermodel
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** A Sega Model 3 Arcade Emulator.
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2021-03-03 15:30:19 +00:00
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** Copyright 2011-2021 Bart Trzynadlowski, Nik Henson, Ian Curtis,
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** Harry Tuttle, and Spindizzi
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2011-07-31 02:37:31 +00:00
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**
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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2021-03-03 15:30:19 +00:00
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** the terms of the GNU General Public License as published by the Free
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2011-07-31 02:37:31 +00:00
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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** Supermodel is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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** more details.
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**
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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/*
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* DSB.h
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2021-03-03 15:30:19 +00:00
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*
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2011-07-31 02:37:31 +00:00
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* Header file for the Sega Digital Sound Board (Type 1 and 2) devices. CDSB1
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* is an implementation of the Z80-based DSB Type 1, and CDSB2 is the 68K-based
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* Type 2 board. Only one may be active at a time because they rely on non-
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* reentrant MPEG playback code.
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*/
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#ifndef INCLUDED_DSB_H
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#define INCLUDED_DSB_H
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#include "Types.h"
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#include "CPU/Bus.h"
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2021-11-22 17:15:06 +00:00
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#include "CPU/68K/68K.h"
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#include "CPU/Z80/Z80.h"
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2017-03-27 03:19:15 +00:00
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#include "Util/NewConfig.h"
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2011-08-19 20:43:07 +00:00
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2021-11-30 23:01:37 +00:00
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#define FIFO_STACK_SIZE 0x100
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#define FIFO_STACK_SIZE_MASK (FIFO_STACK_SIZE - 1)
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2011-08-19 20:43:07 +00:00
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2022-06-19 16:15:54 +00:00
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#define NUM_SAMPLES_PER_FRAME (44100/60)
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2011-07-31 02:37:31 +00:00
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/******************************************************************************
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Resampling
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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Used internally by the DSB's MPEG code. If this becomes sufficiently generic,
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it can be moved to Sound/. Not intended for general use for now.
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******************************************************************************/
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/*
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* CDSBResampler:
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*
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* Frame-by-frame resampler. Resamples one single frame of audio and maintains
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2021-03-03 15:30:19 +00:00
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* continuity between frames by copying unprocessed input samples to the
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* beginning of the buffer and retaining the internal interpolation state.
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2011-07-31 02:37:31 +00:00
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*
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* See DSB.cpp for a detailed description of how this works.
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*
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* NOTE: If the sampling frequencies change, it is probably best to call
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* Reset(). Whether the resampler will otherwise behave correctly and stay
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* within array bounds has not been verified.
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*
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2021-03-03 15:30:19 +00:00
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* Designed for use at 60 Hz, for input frequencies of 11.025, 22.05, 16, and
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2011-07-31 02:37:31 +00:00
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* 32 KHz and 44.1 KHz output frequencies. Theoretically, it should be able to
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2021-03-03 15:30:19 +00:00
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* operate on most output frequencies and input frequencies that are simply
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2011-07-31 02:37:31 +00:00
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* lower, but it has not been extensively verified.
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*/
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class CDSBResampler
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{
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public:
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2022-11-03 10:49:35 +00:00
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int UpSampleAndMix(float *outL, float *outR, INT16 *inL, INT16 *inR, UINT8 volumeL, UINT8 volumeR, int sizeOut, int sizeIn, int outRate, int inRate);
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2011-07-31 02:37:31 +00:00
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void Reset(void);
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2017-03-27 03:19:15 +00:00
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CDSBResampler(const Util::Config::Node &config)
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: m_config(config)
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{
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}
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2011-07-31 02:37:31 +00:00
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private:
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2017-03-27 03:19:15 +00:00
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const Util::Config::Node &m_config;
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2011-07-31 02:37:31 +00:00
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int nFrac;
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int pFrac;
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};
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/******************************************************************************
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DSB Base Class
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******************************************************************************/
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/*
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* CDSB:
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*
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* Abstract base class defining the common interface for both DSB board types.
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*/
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2021-03-03 15:30:19 +00:00
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2016-04-10 03:42:41 +00:00
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class CDSB: public IBus
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2011-07-31 02:37:31 +00:00
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{
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public:
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/*
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* SendCommand(data):
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*
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2021-03-03 15:30:19 +00:00
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* Send a MIDI command to the DSB board.
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2011-07-31 02:37:31 +00:00
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*/
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virtual void SendCommand(UINT8 data) = 0;
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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/*
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* RunFrame(audioL, audioR):
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*
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* Runs one frame and updates the MPEG audio. Audio is mixed into the
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* supplied buffers (they are assumed to already contain audio data).
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*
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* Parameters:
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* audioL Left audio channel, one frame (44 KHz, 1/60th second).
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* audioR Right audio channel.
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*/
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2022-11-03 10:49:35 +00:00
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virtual void RunFrame(float *audioL, float *audioR) = 0;
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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/*
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* Reset(void):
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*
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* Resets the DSB. Must be called prior to RunFrame().
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*/
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virtual void Reset(void) = 0;
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2021-03-03 15:30:19 +00:00
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2011-08-09 18:16:06 +00:00
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/*
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* SaveState(SaveState):
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*
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* Saves an image of the current device state.
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*
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* Parameters:
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* SaveState Block file to save state information to.
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*/
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virtual void SaveState(CBlockFile *SaveState) = 0;
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/*
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* LoadState(SaveState):
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*
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* Loads and a state image.
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*
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* Parameters:
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* SaveState Block file to load state information from.
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*/
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virtual void LoadState(CBlockFile *SaveState) = 0;
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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/*
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* Init(progROMPtr, mpegROMPtr):
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*
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* Initializes the DSB board. This member must be called first.
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*
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* Parameters:
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* progROMPtr Program (68K or Z80) ROM.
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* mpegROMPtr MPEG data ROM.
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*
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* Returns:
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2021-03-03 15:30:19 +00:00
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* OKAY if successful, otherwise FAIL.
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2011-07-31 02:37:31 +00:00
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*/
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2011-09-08 06:34:18 +00:00
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virtual bool Init(const UINT8 *progROMPtr, const UINT8 *mpegROMPtr) = 0;
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2021-03-03 15:30:19 +00:00
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2016-04-02 21:35:06 +00:00
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virtual ~CDSB()
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{
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}
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2011-07-31 02:37:31 +00:00
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};
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/******************************************************************************
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2021-03-03 15:30:19 +00:00
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DSB Classes
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2011-07-31 02:37:31 +00:00
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DSB1 and DSB2 hardware. The base class, CDSB, should ideally be dynamically
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allocated using one of these. See CDSB for descriptions of member functions.
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******************************************************************************/
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/*
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* CDSB1:
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*
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2021-03-03 15:30:19 +00:00
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* Sega Digital Sound Board Type 1: Z80 plus custom gate array for MPEG
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2011-07-31 02:37:31 +00:00
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* decoding.
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*/
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class CDSB1: public CDSB
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{
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public:
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// Read and write handlers for the Z80 (required by CBus)
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UINT8 IORead8(UINT32 addr);
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void IOWrite8(UINT32 addr, UINT8 data);
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UINT8 Read8(UINT32 addr);
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void Write8(UINT32 addr, UINT8 data);
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// DSB interface (see CDSB definition)
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void SendCommand(UINT8 data);
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2022-11-03 10:49:35 +00:00
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void RunFrame(float *audioL, float *audioR);
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2011-07-31 02:37:31 +00:00
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void Reset(void);
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2011-08-09 18:16:06 +00:00
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void SaveState(CBlockFile *StateFile);
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void LoadState(CBlockFile *StateFile);
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2011-09-08 06:34:18 +00:00
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bool Init(const UINT8 *progROMPtr, const UINT8 *mpegROMPtr);
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2021-03-03 15:30:19 +00:00
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2011-09-15 21:10:38 +00:00
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// Returns a reference to the Z80 CPU
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CZ80 *GetZ80(void);
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2011-07-31 02:37:31 +00:00
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// Constructor and destructor
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2017-03-27 03:19:15 +00:00
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CDSB1(const Util::Config::Node &config);
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2011-07-31 02:37:31 +00:00
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~CDSB1(void);
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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private:
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2017-03-27 03:19:15 +00:00
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const Util::Config::Node &m_config;
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2011-07-31 02:37:31 +00:00
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// Resampler
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CDSBResampler Resampler;
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int retainedSamples; // how many MPEG samples carried over from previous frame
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2021-03-03 15:30:19 +00:00
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2019-02-05 10:03:50 +00:00
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// MPEG decode buffers (48KHz, 1/60th second + 2 extra padding samples)
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2011-07-31 02:37:31 +00:00
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INT16 *mpegL, *mpegR;
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// DSB memory
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const UINT8 *progROM; // Z80 program ROM (passed in from parent object)
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const UINT8 *mpegROM; // MPEG music ROM
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UINT8 *memoryPool; // all memory allocated here
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UINT8 *ram; // Z80 RAM
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// Command FIFO
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2021-11-30 23:01:37 +00:00
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UINT8 fifo[FIFO_STACK_SIZE];
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2011-07-31 02:37:31 +00:00
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int fifoIdxR; // read position
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int fifoIdxW; // write position
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// MPEG playback variables
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int mpegStart;
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int mpegEnd;
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int mpegState;
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int loopStart;
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int loopEnd;
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2021-03-03 15:30:19 +00:00
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2011-08-09 18:16:06 +00:00
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// Settings of currently playing stream (may not match the playback register variables above)
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UINT32 usingLoopStart; // what was last set by MPEG_SetLoop() or MPEG_PlayMemory()
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UINT32 usingLoopEnd;
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UINT32 usingMPEGStart; // what was last set by MPEG_PlayMemory()
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UINT32 usingMPEGEnd;
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// Registers
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UINT32 startLatch; // MPEG start address latch
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UINT32 endLatch; // MPEG end address latch
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UINT8 status;
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UINT8 cmdLatch;
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2011-08-09 18:16:06 +00:00
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UINT8 volume; // 0x00-0x7F
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2019-02-21 14:56:25 +00:00
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UINT8 stereo;
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// Z80 CPU
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CZ80 Z80;
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};
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/*
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* CDSB2:
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*
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* Sega Digital Sound Board Type 2: 68K CPU.
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*/
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class CDSB2: public CDSB
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{
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public:
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// Read and write handlers for the 68K (required by CBus)
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UINT8 Read8(UINT32 addr);
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UINT16 Read16(UINT32 addr);
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UINT32 Read32(UINT32 addr);
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void Write8(UINT32 addr, UINT8 data);
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void Write16(UINT32 addr, UINT16 data);
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void Write32(UINT32 addr, UINT32 data);
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// DSB interface (see definition of CDSB)
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void SendCommand(UINT8 data);
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2022-11-03 10:49:35 +00:00
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void RunFrame(float *audioL, float *audioR);
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2011-07-31 02:37:31 +00:00
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void Reset(void);
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2011-08-09 18:16:06 +00:00
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void SaveState(CBlockFile *StateFile);
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void LoadState(CBlockFile *StateFile);
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2011-09-08 06:34:18 +00:00
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bool Init(const UINT8 *progROMPtr, const UINT8 *mpegROMPtr);
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2011-07-31 02:37:31 +00:00
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2011-09-15 21:10:38 +00:00
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// Returns a reference to the 68K CPU context
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M68KCtx *GetM68K(void);
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2011-07-31 02:37:31 +00:00
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// Constructor and destructor
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2017-03-27 03:19:15 +00:00
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CDSB2(const Util::Config::Node &config);
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2011-07-31 02:37:31 +00:00
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~CDSB2(void);
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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private:
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2017-03-27 03:19:15 +00:00
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const Util::Config::Node &m_config;
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2011-07-31 02:37:31 +00:00
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// Private helper functions
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void WriteMPEGFIFO(UINT8 byte);
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// Resampler
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CDSBResampler Resampler;
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int retainedSamples; // how many MPEG samples carried over from previous frame
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// MPEG decode buffers (48KHz, 1/60th second + 2 extra padding samples)
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INT16 *mpegL, *mpegR;
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2021-03-03 15:30:19 +00:00
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2019-02-05 10:03:50 +00:00
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// Stereo mode (do not change values because they are used in save states!)
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2019-02-21 14:56:25 +00:00
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enum class StereoMode: uint8_t
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{
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Stereo = 0, // both channels
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MonoLeft = 1, // mono, using left stream as source data
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MonoRight = 2 // mono, using right stream as source data
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};
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// DSB memory
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2011-08-10 05:35:42 +00:00
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const UINT8 *progROM; // 68K program ROM (passed in from parent object)
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2011-07-31 02:37:31 +00:00
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const UINT8 *mpegROM; // MPEG music ROM
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UINT8 *memoryPool; // all memory allocated here
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2011-08-10 05:35:42 +00:00
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UINT8 *ram; // 68K RAM
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2011-07-31 02:37:31 +00:00
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// Command FIFO
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2021-11-30 23:01:37 +00:00
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UINT8 fifo[FIFO_STACK_SIZE];
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2011-07-31 02:37:31 +00:00
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int fifoIdxR; // read position
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int fifoIdxW; // write position
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// Registers
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2011-08-09 18:16:06 +00:00
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int cmdLatch;
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int mpegState;
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int mpegStart, mpegEnd, playing;
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UINT8 volume[2]; // left, right volume (0x00-0xFF)
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2019-02-05 10:03:50 +00:00
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StereoMode stereo;
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2021-03-03 15:30:19 +00:00
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2011-08-10 05:35:42 +00:00
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// Settings of currently playing stream (may not match the playback register variables above)
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UINT32 usingLoopStart; // what was last set by MPEG_SetLoop() or MPEG_PlayMemory()
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UINT32 usingLoopEnd;
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UINT32 usingMPEGStart; // what was last set by MPEG_PlayMemory()
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UINT32 usingMPEGEnd;
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2021-03-03 15:30:19 +00:00
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2011-07-31 02:37:31 +00:00
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// M68K CPU
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M68KCtx M68K;
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2021-03-13 08:17:11 +00:00
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static const int k_framePeriod = 11000000/60;
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static const int k_timerPeriod = 11000000/1000; // 1KHz timer
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2021-03-07 10:12:37 +00:00
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int m_cyclesElapsedThisFrame;
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2021-03-03 15:30:19 +00:00
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int m_nextTimerInterruptCycles;
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2011-07-31 02:37:31 +00:00
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};
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#endif // INCLUDED_DSB_H
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