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https://github.com/RetroDECK/Supermodel.git
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507 lines
14 KiB
C++
507 lines
14 KiB
C++
/**
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** Supermodel
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** A Sega Model 3 Arcade Emulator.
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** Copyright 2011-2012 Bart Trzynadlowski, Nik Henson
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**
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** This file is part of Supermodel.
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**
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** Supermodel is free software: you can redistribute it and/or modify it under
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** the terms of the GNU General Public License as published by the Free
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** Software Foundation, either version 3 of the License, or (at your option)
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** any later version.
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**
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** Supermodel is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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** FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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** more details.
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**
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** You should have received a copy of the GNU General Public License along
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** with Supermodel. If not, see <http://www.gnu.org/licenses/>.
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**/
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/*
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* TileGen.cpp
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*
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* Implementation of the CTileGen class: 2D tile generator. Palette decoding
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* and synchronization with the renderer (which may run in a separate thread)
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* are performed here as well. For a description of the tile generator
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* hardware, please refer to the 2D rendering engine source code.
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*
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* Palettes
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* --------
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*
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* Multiple copies of the 32K-color palette data are maintained. The first is
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* the raw data as written to the VRAM. Two copies are computed, one for layers
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* A/A' and the other for layers B/B'. These pairs of layers have independent
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* color offset registers associated with them. The renderer uses these
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* "computed" palettes.
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*
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* The computed palettes are updated whenever the real palette is modified, a
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* single color entry at a time. If the color register is modified, the entire
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* palette has to be recomputed accordingly.
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*
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* The read-only copy of the palette, which is generated for the renderer, only
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* stores the two computed palettes.
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*
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* TO-DO List:
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* -----------
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* - For consistency, the registers should probably be byte reversed (this is a
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* little endian device), forcing the Model3 Read32/Write32 handlers to
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* manually reverse the data. This keeps with the convention for VRAM.
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*/
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#include <cstring>
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#include "Supermodel.h"
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// Macros that divide memory regions into pages and mark them as dirty when they are written to
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#define PAGE_WIDTH 10
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#define PAGE_SIZE (1<<PAGE_WIDTH)
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#define DIRTY_SIZE(arraySize) (1+(arraySize-1)/(8*PAGE_SIZE))
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#define MARK_DIRTY(dirtyArray, addr) dirtyArray[addr>>(PAGE_WIDTH+3)] |= 1<<((addr>>PAGE_WIDTH)&7)
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// Offsets of memory regions within TileGen memory pool
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#define OFFSET_VRAM 0x000000 // VRAM and palette data
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#define OFFSET_PAL_A 0x120000 // computed A/A' palette
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#define OFFSET_PAL_B 0x140000 // computed B/B' palette
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#define MEM_POOL_SIZE_RW (0x120000+0x040000)
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#define OFFSET_VRAM_RO 0x160000 // [read-only snapshot]
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#define OFFSET_PAL_RO_A 0x280000 // [read-only snapshot]
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#define OFFSET_PAL_RO_B 0x2A0000
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#define MEM_POOL_SIZE_RO (0x120000+0x040000)
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#define OFFSET_VRAM_DIRTY 0x2C0000
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#define OFFSET_PAL_A_DIRTY (OFFSET_VRAM_DIRTY+DIRTY_SIZE(0x120000))
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#define OFFSET_PAL_B_DIRTY (OFFSET_PAL_A_DIRTY+DIRTY_SIZE(0x20000))
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#define MEM_POOL_SIZE_DIRTY (DIRTY_SIZE(0x120000)+2*DIRTY_SIZE(0x20000)) // VRAM + 2 palette dirty buffers
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#define MEMORY_POOL_SIZE (MEM_POOL_SIZE_RW+MEM_POOL_SIZE_RO+MEM_POOL_SIZE_DIRTY)
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/******************************************************************************
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Save States
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******************************************************************************/
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void CTileGen::SaveState(CBlockFile *SaveState)
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{
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SaveState->NewBlock("Tile Generator", __FILE__);
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SaveState->Write(vram, 0x120000); // Don't write out palette, read-only snapshots or dirty page arrays, just VRAM
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SaveState->Write(regs, sizeof(regs));
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}
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void CTileGen::LoadState(CBlockFile *SaveState)
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{
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if (OKAY != SaveState->FindBlock("Tile Generator"))
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{
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ErrorLog("Unable to load tile generator state. Save state file is corrupt.");
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return;
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}
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// Load memory one word at a time
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for (int i = 0; i < 0x120000; i += 4)
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{
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UINT32 data;
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SaveState->Read(&data, sizeof(data));
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WriteRAM(i, data);
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}
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SaveState->Read(regs, sizeof(regs));
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// Because regs were read after palette, must recompute
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RecomputePalettes();
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// If multi-threaded, update read-only snapshots too
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if (g_Config.gpuMultiThreaded)
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UpdateSnapshots(true);
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}
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/******************************************************************************
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Rendering
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******************************************************************************/
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void CTileGen::BeginVBlank(void)
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{
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/*
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printf("08: %X\n", regs[0x08/4]);
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printf("0C: %X\n", regs[0x0C/4]);
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printf("20: %X\n", regs[0x20/4]);
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printf("40: %X\n", regs[0x40/4]);
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printf("44: %X\n", regs[0x44/4]);
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printf("60: %08X\n", regs[0x60/4]);
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printf("64: %08X\n", regs[0x64/4]);
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printf("68: %08X\n", regs[0x68/4]);
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printf("6C: %08X\n", regs[0x6C/4]);
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printf("\n");
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*/
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}
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void CTileGen::EndVBlank(void)
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{
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//
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}
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void CTileGen::RecomputePalettes(void)
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{
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// Writing the colors forces palettes to be computed
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if (g_Config.gpuMultiThreaded)
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{
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for (unsigned colorAddr = 0; colorAddr < 32768*4; colorAddr += 4 )
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{
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MARK_DIRTY(palDirty[0], colorAddr);
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MARK_DIRTY(palDirty[1], colorAddr);
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WritePalette(colorAddr/4, *(UINT32 *) &vram[0x100000+colorAddr]);
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}
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}
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else
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{
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for (unsigned colorAddr = 0; colorAddr < 32768*4; colorAddr += 4 )
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WritePalette(colorAddr/4, *(UINT32 *) &vram[0x100000+colorAddr]);
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}
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}
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UINT32 CTileGen::SyncSnapshots(void)
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{
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// Good time to recompute the palettes
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if (recomputePalettes)
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{
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RecomputePalettes();
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recomputePalettes = false;
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}
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if (!g_Config.gpuMultiThreaded)
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return 0;
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// Update read-only snapshots
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return UpdateSnapshots(false);
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}
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UINT32 CTileGen::UpdateSnapshot(bool copyWhole, UINT8 *src, UINT8 *dst, unsigned size, UINT8 *dirty)
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{
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unsigned dirtySize = DIRTY_SIZE(size);
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if (copyWhole)
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{
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// If updating whole region, then just copy all data in one go
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memcpy(dst, src, size);
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memset(dirty, 0, dirtySize);
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return size;
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}
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else
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{
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// Otherwise, loop through dirty pages array to find out what needs to be updated and copy only those parts
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UINT32 copied = 0;
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UINT8 *pSrc = src;
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UINT8 *pDst = dst;
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for (unsigned i = 0; i < dirtySize; i++)
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{
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UINT8 d = dirty[i];
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if (d)
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{
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for (unsigned j = 0; j < 8; j++)
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{
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if (d&1)
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{
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// If not at very end of region, then copy an extra 4 bytes to allow for a possible 32-bit overlap
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UINT32 toCopy = (i < dirtySize - 1 || j < 7 ? PAGE_SIZE + 4 : PAGE_SIZE);
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memcpy(pDst, pSrc, toCopy);
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copied += toCopy;
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}
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d >>= 1;
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pSrc += PAGE_SIZE;
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pDst += PAGE_SIZE;
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}
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dirty[i] = 0;
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}
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else
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{
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pSrc += 8 * PAGE_SIZE;
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pDst += 8 * PAGE_SIZE;
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}
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}
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return copied;
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}
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}
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UINT32 CTileGen::UpdateSnapshots(bool copyWhole)
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{
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// Update all memory region snapshots
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UINT32 palACopied = UpdateSnapshot(copyWhole, (UINT8*)pal[0], (UINT8*)palRO[0], 0x020000, palDirty[0]);
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UINT32 palBCopied = UpdateSnapshot(copyWhole, (UINT8*)pal[1], (UINT8*)palRO[1], 0x020000, palDirty[1]);
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UINT32 vramCopied = UpdateSnapshot(copyWhole, (UINT8*)vram, (UINT8*)vramRO, 0x120000, vramDirty);
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memcpy(regsRO, regs, sizeof(regs)); // Always copy whole of regs buffer
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//printf("TileGen copied - palA:%4uK, palB:%4uK, vram:%4uK, regs:%uK\n", palACopied / 1024, palBCopied / 1024, vramCopied / 1024, sizeof(regs) / 1024);
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return palACopied + palBCopied + vramCopied + sizeof(regs);
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}
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void CTileGen::BeginFrame(void)
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{
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// NOTE: Render2D->WriteVRAM(addr, data) is no longer being called for RAM addresses that are written
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// to and instead this class relies upon the fact that Render2D currently marks everything as dirty
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// with every frame. If this were to change in the future then code to handle marking the correct
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// parts of the renderer as dirty would need to be added here.
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Render2D->BeginFrame();
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}
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void CTileGen::PreRenderFrame(void)
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{
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Render2D->PreRenderFrame();
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}
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void CTileGen::RenderFrameBottom(void)
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{
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Render2D->RenderFrameBottom();
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}
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void CTileGen::RenderFrameTop(void)
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{
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Render2D->RenderFrameTop();
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}
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void CTileGen::EndFrame(void)
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{
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Render2D->EndFrame();
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}
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/******************************************************************************
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Emulation Functions
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******************************************************************************/
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UINT32 CTileGen::ReadRAM(unsigned addr)
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{
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return *(UINT32 *) &vram[addr];
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}
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void CTileGen::WriteRAM(unsigned addr, UINT32 data)
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{
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if (g_Config.gpuMultiThreaded)
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MARK_DIRTY(vramDirty, addr);
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*(UINT32 *) &vram[addr] = data;
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// Update palette if required
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if (addr >= 0x100000)
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{
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addr -= 0x100000;
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unsigned color = addr/4; // color index
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// Same address in both palettes must be marked dirty
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if (g_Config.gpuMultiThreaded)
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{
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MARK_DIRTY(palDirty[0], addr);
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MARK_DIRTY(palDirty[1], addr);
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}
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// Both palettes will be modified simultaneously
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WritePalette(color, data);
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}
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}
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void CTileGen::InitPalette(void)
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{
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for (int i = 0; i < 0x20000/4; i++)
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{
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WritePalette(i, *(UINT32 *) &vram[0x100000 + i*4]);
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if (g_Config.gpuMultiThreaded)
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{
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palRO[0][i] = pal[0][i];
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palRO[1][i] = pal[1][i];
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}
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}
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}
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static inline UINT32 AddColorOffset(UINT8 r, UINT8 g, UINT8 b, UINT8 a, UINT32 offsetReg)
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{
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INT32 ir, ig, ib;
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/*
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* Color offsets are signed but I'm not sure whether or not their range is
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* merely [-128,+127], which would mean adding to a 0 component would not
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* result full intensity (only +127 at most). Alternatively, the signed
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* value might have to be multiplied by 2. That is assumed here. In either
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* case, the signed addition should be saturated.
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*/
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ib = (INT32) (INT8)((offsetReg>>16)&0xFF);
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ig = (INT32) (INT8)((offsetReg>>8)&0xFF);
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ir = (INT32) (INT8)((offsetReg>>0)&0xFF);
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ib *= 2;
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ig *= 2;
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ir *= 2;
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// Add with saturation
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ib += (INT32) (UINT32) b;
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if (ib < 0) ib = 0;
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else if (ib > 0xFF) ib = 0xFF;
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ig += (INT32) (UINT32) g;
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if (ig < 0) ig = 0;
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else if (ig > 0xFF) ig = 0xFF;
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ir += (INT32) (UINT32) r;
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if (ir < 0) ir = 0;
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else if (ir > 0xFF) ir = 0xFF;
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// Construct the final 32-bit ABGR-format color
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r = (UINT8) ir;
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g = (UINT8) ig;
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b = (UINT8) ib;
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return ((UINT32)a<<24)|((UINT32)b<<16)|((UINT32)g<<8)|(UINT32)r;
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}
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void CTileGen::WritePalette(unsigned color, UINT32 data)
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{
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UINT8 r, g, b, a;
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a = 0xFF * ((data>>15)&1); // decode the RGBA (make alpha 0xFF or 0x00)
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a = ~a; // invert it (set on Model 3 means clear pixel)
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if ((data&0x8000))
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r = g = b = 0;
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else
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{
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b = (data>>7)&0xF8;
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g = (data>>2)&0xF8;
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r = (data<<3)&0xF8;
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}
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pal[0][color] = AddColorOffset(r, g, b, a, regs[0x40/4]); // A/A'
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pal[1][color] = AddColorOffset(r, g, b, a, regs[0x44/4]); // B/B'
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}
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void CTileGen::WriteRegister(unsigned reg, UINT32 data)
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{
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reg &= 0xFF;
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switch (reg)
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{
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case 0x08:
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case 0x0C:
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case 0x20:
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case 0x60:
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case 0x64:
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case 0x68:
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case 0x6C:
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break;
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case 0x40: // layer A/A' color offset
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case 0x44: // layer B/B' color offset
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// We only have a mechanism to recompute both palettes simultaneously.
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// These regs are often written together in the same frame. To avoid
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// needlessly recomputing both palettes twice, we defer the operation.
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if (regs[reg/4] != data) // only if changed
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recomputePalettes = true;
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break;
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case 0x10: // IRQ acknowledge
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IRQ->Deassert(data&0xFF);
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break;
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default:
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DebugLog("Tile Generator reg %02X = %08X\n", reg, data);
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//printf("%02X = %08X\n", reg, data);
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break;
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}
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// Modify register
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regs[reg/4] = data;
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}
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void CTileGen::Reset(void)
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{
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unsigned memSize = (g_Config.gpuMultiThreaded ? MEMORY_POOL_SIZE : MEM_POOL_SIZE_RW);
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memset(memoryPool, 0, memSize);
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memset(regs, 0, sizeof(regs));
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memset(regsRO, 0, sizeof(regsRO));
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InitPalette();
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recomputePalettes = false;
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DebugLog("Tile Generator reset\n");
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}
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/******************************************************************************
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Configuration, Initialization, and Shutdown
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******************************************************************************/
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void CTileGen::AttachRenderer(CRender2D *Render2DPtr)
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{
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Render2D = Render2DPtr;
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// If multi-threaded, attach read-only snapshots to renderer instead of real ones
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if (g_Config.gpuMultiThreaded)
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{
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Render2D->AttachVRAM(vramRO);
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Render2D->AttachPalette((const UINT32 **)palRO);
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Render2D->AttachRegisters(regsRO);
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}
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else
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{
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Render2D->AttachVRAM(vram);
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Render2D->AttachPalette((const UINT32 **)pal);
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Render2D->AttachRegisters(regs);
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}
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DebugLog("Tile Generator attached a Render2D object\n");
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}
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bool CTileGen::Init(CIRQ *IRQObjectPtr)
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{
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unsigned memSize = (g_Config.gpuMultiThreaded ? MEMORY_POOL_SIZE : MEM_POOL_SIZE_RW);
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float memSizeMB = (float)memSize/(float)0x100000;
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// Allocate all memory for all TileGen RAM regions
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memoryPool = new(std::nothrow) UINT8[memSize];
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if (NULL == memoryPool)
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return ErrorLog("Insufficient memory for tile generator object (needs %1.1f MB).", memSizeMB);
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// Set up main pointers
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vram = (UINT8 *) &memoryPool[OFFSET_VRAM];
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pal[0] = (UINT32 *) &memoryPool[OFFSET_PAL_A];
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pal[1] = (UINT32 *) &memoryPool[OFFSET_PAL_B];
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// If multi-threaded, set up pointers for read-only snapshots and dirty page arrays too
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if (g_Config.gpuMultiThreaded)
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{
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vramRO = (UINT8 *) &memoryPool[OFFSET_VRAM_RO];
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palRO[0] = (UINT32 *) &memoryPool[OFFSET_PAL_RO_A];
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palRO[1] = (UINT32 *) &memoryPool[OFFSET_PAL_RO_B];
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vramDirty = (UINT8 *) &memoryPool[OFFSET_VRAM_DIRTY];
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palDirty[0] = (UINT8 *) &memoryPool[OFFSET_PAL_A_DIRTY];
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palDirty[1] = (UINT8 *) &memoryPool[OFFSET_PAL_B_DIRTY];
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}
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// Hook up the IRQ controller
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IRQ = IRQObjectPtr;
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DebugLog("Initialized Tile Generator (allocated %1.1f MB and connected to IRQ controller)\n", memSizeMB);
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return OKAY;
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}
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CTileGen::CTileGen(void)
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{
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IRQ = NULL;
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memoryPool = NULL;
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DebugLog("Built Tile Generator\n");
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}
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CTileGen::~CTileGen(void)
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{
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// Dump tile generator RAM
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#if 0
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FILE *fp;
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fp = fopen("tileram", "wb");
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if (NULL != fp)
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{
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fwrite(memoryPool, sizeof(UINT8), 0x120000, fp);
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fclose(fp);
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printf("dumped %s\n", "tileram");
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}
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else
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printf("unable to dump %s\n", "tileram");
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#endif
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IRQ = NULL;
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if (memoryPool != NULL)
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{
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delete [] memoryPool;
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memoryPool = NULL;
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|
}
|
|
DebugLog("Destroyed Tile Generator\n");
|
|
}
|