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472 commits 1 branch 1 tag 100 MiB
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460 commits

Author SHA1 Message Date
Connor McLaughlin 5b745864e3 CPU/Recompiler: Implement sub/subu 2019-11-23 00:30:47 +10:00
Connor McLaughlin f14ad1d3c4 CPU/Recompiler: Implement add/addu/addi 2019-11-23 00:26:56 +10:00
Connor McLaughlin 641e68db95 CPU/Recompiler: Implement b{gez,ltz}(al)? 2019-11-23 00:25:51 +10:00
Connor McLaughlin 167e2a3454 CPU/Recompiler: Implement j/jal/jr/jalr/beq/bne/bgtz/blez 2019-11-22 21:41:10 +10:00
Connor McLaughlin ff398a3f77 Revert "Frontend: Swap L1/R1 and L2/R2 bindings" 
This reverts commit a25fe54a4b.
 2019-11-22 18:28:41 +10:00
Connor McLaughlin 11966e4caf CPU/Recompiler: Write exception exits to far code buffer 
Keeps the hot path nice and clean.
 2019-11-22 18:01:28 +10:00
Connor McLaughlin 7b0978119b CPU: Only write exceptions to log when logging 2019-11-22 17:54:06 +10:00
Connor McLaughlin f46160ac46 CPU/Recompiler: Implement mult/multu 2019-11-22 16:45:13 +10:00
Connor McLaughlin e5c0d28fdc CPU/Recompiler: Implement mfhi/mthi/mflo/mtlo 2019-11-22 10:53:54 +10:00
Connor McLaughlin 51a873e58d CPU: Expand register file to include hi/lo/pc/npc 2019-11-22 10:53:54 +10:00
Connor McLaughlin 330d512831 CPU: Write exceptions to trace log 2019-11-22 10:53:15 +10:00
Connor McLaughlin 9e82afac7b CPU/Recompiler: Support block revalidation instead of flushing 2019-11-22 00:32:40 +10:00
Connor McLaughlin 7aafaeacbc CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions 
Currently not passing CPU tests when combined with lwl/lwr.
 2019-11-21 23:34:04 +10:00
Connor McLaughlin 9e3bb62216 CPU/CodeCache: Fast path for self-linking blocks 2019-11-20 01:19:03 +10:00
Connor McLaughlin 09de3819eb CPU/Recompiler: Implement sra/srav instructions 2019-11-20 01:00:31 +10:00
Connor McLaughlin 4f436461ff CPU/Recompiler: Combine shift instructions 2019-11-20 01:00:31 +10:00
Connor McLaughlin 51600c5bc0 CPU/Recompiler: Implement andi/xori, combine BitwiseImmediate 2019-11-20 01:00:31 +10:00
Connor McLaughlin 6157aa9d21 CPU/Recompiler: Implement srlv/srrv instructions 2019-11-20 00:32:41 +10:00
Connor McLaughlin 82cbb6e1b8 CPU/Recompiler: Implement srl instruction 2019-11-20 00:21:02 +10:00
Connor McLaughlin 5217088d82 CPU: Refactor load delay handling 
Now works when mixing interpreter and recompiler code.
 2019-11-20 00:15:15 +10:00
Connor McLaughlin 1d6c4a3af1 CPU: Basic recompiler implementation for x64 (lui, ori, addiu) 
Disabled by default.
 2019-11-19 20:38:05 +10:00
Connor McLaughlin b9089cac95 System: Fix EXE loading again 2019-11-18 21:03:48 +10:00
Connor McLaughlin 19062e11b5 Revert "Bus: Relax memory timing" 
This reverts commit b5c799ba81.
 2019-11-17 22:11:16 +10:00
Connor McLaughlin 38d0f46063 Frontend: Fix some GPU settings not saving to ini 2019-11-17 22:10:55 +10:00
Connor McLaughlin 48e3683d20 HostInterface: Fix load state on boot not loading state 2019-11-17 19:41:25 +10:00
Connor McLaughlin 1f4dbd1060 Frontend: Implement D3D<->GL renderer switching 2019-11-17 19:37:10 +10:00
Connor McLaughlin d1f7ad2512 HostInterface: Fix display classes not getting destructed 2019-11-17 19:36:56 +10:00
Connor McLaughlin 55550798e4 Frontend: Call timeBeginPeriod() to increase timer resolution 
Hopefully will prevent FPS fluctuations due to sleep variation.
 2019-11-17 01:47:52 +10:00
Connor McLaughlin b2b5e6c793 HostInterface: Reset throttle timer on slowdown 
Prevents too slow messages when fast forwarding.
 2019-11-17 01:47:50 +10:00
Connor McLaughlin b5c799ba81 Bus: Relax memory timing 
Formulas from Mednafen.
 2019-11-17 01:47:46 +10:00
Connor McLaughlin 8fb4f73d17 Settings: Add audio sync and additional cleanup 2019-11-16 20:52:39 +10:00
Connor McLaughlin 3673c6e33c HostInterface: Re-enable audio sync by default 2019-11-16 20:52:39 +10:00
Connor McLaughlin f1289d6161 Settings: Hook up console region 2019-11-16 20:52:39 +10:00
Connor McLaughlin 613e4f4a2a GPU: Set PAL mode on soft reset if region is PAL 2019-11-16 20:52:39 +10:00
Connor McLaughlin 49ab9467df GPU: Set throttle frequency based on mode config 2019-11-16 20:52:39 +10:00
Connor McLaughlin 77fe883901 System: Default to NTSC region for BIOS boot if auto 2019-11-16 20:52:39 +10:00
Connor McLaughlin b57f1d4a60 HostInterface: Implement non-vsync based speed throttler 
Needed for PAL games.
 2019-11-16 20:52:39 +10:00
Connor McLaughlin 246c97ccb3 System: Scaffolding for multi-system/multi-bios 2019-11-16 20:50:59 +10:00
Connor McLaughlin d6209937fb CDROM: Properly handle audio sectors in SeekL 2019-11-16 12:54:41 +10:00
Connor McLaughlin f12b97e98b DMA: Add missing transfer_ticks to save state 2019-11-16 01:51:22 +10:00
Connor McLaughlin 4524172573 Frontend: Use flip model swap chains in D3D 2019-11-16 01:45:31 +10:00
Connor McLaughlin 2399c1dab7 SPU: Fix incorrect step value in attack phase 2019-11-16 01:43:34 +10:00
Connor McLaughlin a47492382c System: Add "fast boot" option (skip boot logo) 2019-11-16 01:04:52 +10:00
Connor McLaughlin 30fd7a6683 DMA: Support delaying transfers 
Fixes Syphon Filter 2/3.
 2019-11-15 23:27:56 +10:00
Connor McLaughlin e02ebb1b2a SPU: Mute voice without release phase on loop/end flag 
Fixes channels getting stuck in Syphon Filter.
 2019-11-15 17:24:11 +10:00
Connor McLaughlin 5b5d22fd27 SPU: Stub out transfer control register 
Fixes sound in Ridge Racer.
 2019-11-15 16:44:23 +10:00
Connor McLaughlin d9c27c4ee3 SPU: Fix sustain step being ignored 2019-11-15 16:42:25 +10:00
Connor McLaughlin 4e9d5b77f8 GPU: Fix swapped bytes for VRAM->CPU transfers 2019-11-15 15:05:27 +10:00
Connor McLaughlin f27ad2fa67 Frontend: Re-implement fullscreen 2019-11-15 14:57:27 +10:00
Connor McLaughlin a25fe54a4b Frontend: Swap L1/R1 and L2/R2 bindings 2019-11-15 14:13:05 +10:00