Connor McLaughlin
|
299ee05cd9
|
HostInterface: Move OSD messages to base class
|
2019-12-01 21:33:56 +10:00 |
|
Connor McLaughlin
|
0a6b913536
|
HostInterface: Move performance counters to base class
|
2019-12-01 21:29:09 +10:00 |
|
Connor McLaughlin
|
abfa531648
|
GameList: Add disc size
|
2019-12-01 19:52:00 +10:00 |
|
Connor McLaughlin
|
ea52b9e8aa
|
GameList: Support parsing Redump.org dat files
|
2019-12-01 19:52:00 +10:00 |
|
Connor McLaughlin
|
04c70b3118
|
Add initial game list class implementation
|
2019-11-29 23:46:11 +10:00 |
|
Connor McLaughlin
|
ea0b13a05c
|
More changes to accomodate Android - imgui/host display
|
2019-11-28 23:32:57 +10:00 |
|
Connor McLaughlin
|
f11d357ab9
|
Compile fixes for Android
|
2019-11-28 01:55:33 +10:00 |
|
Connor McLaughlin
|
aec01d3890
|
Bus: Reduce RAM write delay
|
2019-11-27 00:01:47 +10:00 |
|
Connor McLaughlin
|
519dbc818d
|
CPU/CodeCache: Fix DMA writes not invalidating code blocks
Fixes Crash Team Racing and Spyro in Cached Interpreter/Recompiler
modes.
|
2019-11-26 19:45:38 +10:00 |
|
Connor McLaughlin
|
771a151567
|
GPU/OpenGL: Use CopyImageSubData for VRAM copies
Not correct with regard to the mask bit handling, but better than
blitting.
|
2019-11-25 00:27:23 +10:00 |
|
Connor McLaughlin
|
22e8b6b0a7
|
System: Fall back to software when D3D11 selected on Linux
|
2019-11-25 00:24:22 +10:00 |
|
Connor McLaughlin
|
0bc7333e6e
|
GPU/OpenGL: Set GLSL version string dynamically
Rather than hardcoding to 3.3.
|
2019-11-25 00:17:17 +10:00 |
|
Connor McLaughlin
|
db0d11c2ff
|
GPU/HW: Cull primitives larger than 1024x512
|
2019-11-24 23:46:33 +10:00 |
|
Connor McLaughlin
|
024ed01bbb
|
GPU/HW: Set alpha to mask bit setting
|
2019-11-24 23:30:35 +10:00 |
|
Connor McLaughlin
|
bc5a247a4b
|
GPU/HW: Use dual-source blend to split alpha and mask
|
2019-11-24 23:28:01 +10:00 |
|
Connor McLaughlin
|
9d6d00480c
|
GPU: Implement mask bit handling in software renderer
Still needs implementation in the hardware renderers.
|
2019-11-24 18:47:42 +10:00 |
|
Connor McLaughlin
|
6c6bf8714c
|
CPU/Recompiler: Only check interpreter load delay when it's dirty
|
2019-11-24 16:51:08 +10:00 |
|
Connor McLaughlin
|
e3965d9be3
|
CPU/Recompiler: Fix b{ltz,gez}al when using a load delayed register
|
2019-11-24 16:47:21 +10:00 |
|
Connor McLaughlin
|
8c5fcc8f48
|
CPU: Fix more load delay slot issues
Fixes Spyro again. b{ltz,gez}(al)? disabled in the recompiler until
issues are fixed.
|
2019-11-24 01:11:51 +10:00 |
|
Connor McLaughlin
|
889bd73ac8
|
CPU: Add settings for execution mode
|
2019-11-23 20:22:09 +10:00 |
|
Connor McLaughlin
|
b8de55b9b8
|
CPU/Recompiler: Implement simple block linking
|
2019-11-23 19:56:19 +10:00 |
|
Connor McLaughlin
|
201be8aa9c
|
CPU: Fix interpreter speed regression from recompiler
Seems the logging prevented ExecuteInstruction() from being inlined.
|
2019-11-23 19:49:44 +10:00 |
|
Connor McLaughlin
|
5d0a6f88ad
|
CDROM: Header valid/playing should not be set on SeekL
Fixes Syphon Filter locking up on boot.
|
2019-11-23 19:13:50 +10:00 |
|
Connor McLaughlin
|
bb4ef2103e
|
GPU: Fix dump vram-to-cpu copies
|
2019-11-23 19:07:17 +10:00 |
|
Connor McLaughlin
|
da69085b3c
|
CPU/Recompiler: Implement nor
|
2019-11-23 12:53:44 +10:00 |
|
Connor McLaughlin
|
2f3107216a
|
CPU/Recompiler: Implement syscall/break
|
2019-11-23 12:51:17 +10:00 |
|
Connor McLaughlin
|
d2d0d5287b
|
CPU/Recompiler: Implement slt/sltu/slti/sltiu
|
2019-11-23 01:20:59 +10:00 |
|
Connor McLaughlin
|
bdc47319dc
|
CPU/Recompiler: Remove unused variable
|
2019-11-23 00:45:46 +10:00 |
|
Connor McLaughlin
|
e2850b5a6c
|
CPU/Recompiler: Implement and/or/xor
|
2019-11-23 00:41:25 +10:00 |
|
Connor McLaughlin
|
a9cbc08890
|
CPU/Recompiler: Cleanup/combine shift immediate/variable
|
2019-11-23 00:35:32 +10:00 |
|
Connor McLaughlin
|
5b745864e3
|
CPU/Recompiler: Implement sub/subu
|
2019-11-23 00:30:47 +10:00 |
|
Connor McLaughlin
|
f14ad1d3c4
|
CPU/Recompiler: Implement add/addu/addi
|
2019-11-23 00:26:56 +10:00 |
|
Connor McLaughlin
|
641e68db95
|
CPU/Recompiler: Implement b{gez,ltz}(al)?
|
2019-11-23 00:25:51 +10:00 |
|
Connor McLaughlin
|
167e2a3454
|
CPU/Recompiler: Implement j/jal/jr/jalr/beq/bne/bgtz/blez
|
2019-11-22 21:41:10 +10:00 |
|
Connor McLaughlin
|
11966e4caf
|
CPU/Recompiler: Write exception exits to far code buffer
Keeps the hot path nice and clean.
|
2019-11-22 18:01:28 +10:00 |
|
Connor McLaughlin
|
7b0978119b
|
CPU: Only write exceptions to log when logging
|
2019-11-22 17:54:06 +10:00 |
|
Connor McLaughlin
|
f46160ac46
|
CPU/Recompiler: Implement mult/multu
|
2019-11-22 16:45:13 +10:00 |
|
Connor McLaughlin
|
e5c0d28fdc
|
CPU/Recompiler: Implement mfhi/mthi/mflo/mtlo
|
2019-11-22 10:53:54 +10:00 |
|
Connor McLaughlin
|
51a873e58d
|
CPU: Expand register file to include hi/lo/pc/npc
|
2019-11-22 10:53:54 +10:00 |
|
Connor McLaughlin
|
330d512831
|
CPU: Write exceptions to trace log
|
2019-11-22 10:53:15 +10:00 |
|
Connor McLaughlin
|
9e82afac7b
|
CPU/Recompiler: Support block revalidation instead of flushing
|
2019-11-22 00:32:40 +10:00 |
|
Connor McLaughlin
|
7aafaeacbc
|
CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions
Currently not passing CPU tests when combined with lwl/lwr.
|
2019-11-21 23:34:04 +10:00 |
|
Connor McLaughlin
|
9e3bb62216
|
CPU/CodeCache: Fast path for self-linking blocks
|
2019-11-20 01:19:03 +10:00 |
|
Connor McLaughlin
|
09de3819eb
|
CPU/Recompiler: Implement sra/srav instructions
|
2019-11-20 01:00:31 +10:00 |
|
Connor McLaughlin
|
4f436461ff
|
CPU/Recompiler: Combine shift instructions
|
2019-11-20 01:00:31 +10:00 |
|
Connor McLaughlin
|
51600c5bc0
|
CPU/Recompiler: Implement andi/xori, combine BitwiseImmediate
|
2019-11-20 01:00:31 +10:00 |
|
Connor McLaughlin
|
6157aa9d21
|
CPU/Recompiler: Implement srlv/srrv instructions
|
2019-11-20 00:32:41 +10:00 |
|
Connor McLaughlin
|
82cbb6e1b8
|
CPU/Recompiler: Implement srl instruction
|
2019-11-20 00:21:02 +10:00 |
|
Connor McLaughlin
|
5217088d82
|
CPU: Refactor load delay handling
Now works when mixing interpreter and recompiler code.
|
2019-11-20 00:15:15 +10:00 |
|
Connor McLaughlin
|
1d6c4a3af1
|
CPU: Basic recompiler implementation for x64 (lui, ori, addiu)
Disabled by default.
|
2019-11-19 20:38:05 +10:00 |
|
Connor McLaughlin
|
b9089cac95
|
System: Fix EXE loading again
|
2019-11-18 21:03:48 +10:00 |
|
Connor McLaughlin
|
19062e11b5
|
Revert "Bus: Relax memory timing"
This reverts commit b5c799ba81 .
|
2019-11-17 22:11:16 +10:00 |
|
Connor McLaughlin
|
38d0f46063
|
Frontend: Fix some GPU settings not saving to ini
|
2019-11-17 22:10:55 +10:00 |
|
Connor McLaughlin
|
48e3683d20
|
HostInterface: Fix load state on boot not loading state
|
2019-11-17 19:41:25 +10:00 |
|
Connor McLaughlin
|
d1f7ad2512
|
HostInterface: Fix display classes not getting destructed
|
2019-11-17 19:36:56 +10:00 |
|
Connor McLaughlin
|
b2b5e6c793
|
HostInterface: Reset throttle timer on slowdown
Prevents too slow messages when fast forwarding.
|
2019-11-17 01:47:50 +10:00 |
|
Connor McLaughlin
|
b5c799ba81
|
Bus: Relax memory timing
Formulas from Mednafen.
|
2019-11-17 01:47:46 +10:00 |
|
Connor McLaughlin
|
8fb4f73d17
|
Settings: Add audio sync and additional cleanup
|
2019-11-16 20:52:39 +10:00 |
|
Connor McLaughlin
|
3673c6e33c
|
HostInterface: Re-enable audio sync by default
|
2019-11-16 20:52:39 +10:00 |
|
Connor McLaughlin
|
f1289d6161
|
Settings: Hook up console region
|
2019-11-16 20:52:39 +10:00 |
|
Connor McLaughlin
|
613e4f4a2a
|
GPU: Set PAL mode on soft reset if region is PAL
|
2019-11-16 20:52:39 +10:00 |
|
Connor McLaughlin
|
49ab9467df
|
GPU: Set throttle frequency based on mode config
|
2019-11-16 20:52:39 +10:00 |
|
Connor McLaughlin
|
77fe883901
|
System: Default to NTSC region for BIOS boot if auto
|
2019-11-16 20:52:39 +10:00 |
|
Connor McLaughlin
|
b57f1d4a60
|
HostInterface: Implement non-vsync based speed throttler
Needed for PAL games.
|
2019-11-16 20:52:39 +10:00 |
|
Connor McLaughlin
|
246c97ccb3
|
System: Scaffolding for multi-system/multi-bios
|
2019-11-16 20:50:59 +10:00 |
|
Connor McLaughlin
|
d6209937fb
|
CDROM: Properly handle audio sectors in SeekL
|
2019-11-16 12:54:41 +10:00 |
|
Connor McLaughlin
|
f12b97e98b
|
DMA: Add missing transfer_ticks to save state
|
2019-11-16 01:51:22 +10:00 |
|
Connor McLaughlin
|
2399c1dab7
|
SPU: Fix incorrect step value in attack phase
|
2019-11-16 01:43:34 +10:00 |
|
Connor McLaughlin
|
a47492382c
|
System: Add "fast boot" option (skip boot logo)
|
2019-11-16 01:04:52 +10:00 |
|
Connor McLaughlin
|
30fd7a6683
|
DMA: Support delaying transfers
Fixes Syphon Filter 2/3.
|
2019-11-15 23:27:56 +10:00 |
|
Connor McLaughlin
|
e02ebb1b2a
|
SPU: Mute voice without release phase on loop/end flag
Fixes channels getting stuck in Syphon Filter.
|
2019-11-15 17:24:11 +10:00 |
|
Connor McLaughlin
|
5b5d22fd27
|
SPU: Stub out transfer control register
Fixes sound in Ridge Racer.
|
2019-11-15 16:44:23 +10:00 |
|
Connor McLaughlin
|
d9c27c4ee3
|
SPU: Fix sustain step being ignored
|
2019-11-15 16:42:25 +10:00 |
|
Connor McLaughlin
|
4e9d5b77f8
|
GPU: Fix swapped bytes for VRAM->CPU transfers
|
2019-11-15 15:05:27 +10:00 |
|
Connor McLaughlin
|
f27ad2fa67
|
Frontend: Re-implement fullscreen
|
2019-11-15 14:57:27 +10:00 |
|
Connor McLaughlin
|
708ce25cb0
|
GPU/HW: Fix resolution changing while running corrupting screen
|
2019-11-14 22:24:47 +10:00 |
|
Connor McLaughlin
|
49569d29aa
|
GPU: Refactor command execution/VRAM->CPU transfers
Simpler, and handles odd sizes correctly.
|
2019-11-14 22:17:11 +10:00 |
|
Connor McLaughlin
|
bc9ed3572b
|
GPU/HW: Fix flipped GPU readback in D3D11
|
2019-11-14 22:11:12 +10:00 |
|
Connor McLaughlin
|
9d66638bce
|
GPU: Handle oversized transfers (wrap around behavior)
|
2019-11-14 20:31:48 +10:00 |
|
Connor McLaughlin
|
9ea7a8418c
|
GPU: Eliminate temporary buffer when reading back
|
2019-11-14 17:17:22 +10:00 |
|
Connor McLaughlin
|
3998b9684e
|
GPU/HW: GPU-based RGBA8->RGB5551 conversion for readbacks
|
2019-11-14 17:16:21 +10:00 |
|
Connor McLaughlin
|
53881219ce
|
GPU: Fix handling of interlaced non-480-line mode
|
2019-11-14 00:59:09 +10:00 |
|
Connor McLaughlin
|
7152d54104
|
GPU: Simplify 480i mode handling in CRTC
|
2019-11-14 00:58:15 +10:00 |
|
Connor McLaughlin
|
b48accf0bf
|
GPU/HW: Fix 24-bit output broken with >1x res scale
|
2019-11-13 22:54:52 +10:00 |
|
Connor McLaughlin
|
76172c88f3
|
GPU/HW: Disable blending when updating VRAM
Fixes random breakage when it was previously enabled.
|
2019-11-13 22:48:39 +10:00 |
|
Connor McLaughlin
|
f7f4818de4
|
GPU/HW: Explicitly specify std140 layout for UBOs
|
2019-11-13 22:48:14 +10:00 |
|
Connor McLaughlin
|
8cfb8d7922
|
CDROM: Fix track skip behavior with track=0
Fixes Doom.
|
2019-11-13 16:33:51 +10:00 |
|
Connor McLaughlin
|
8e06f86db8
|
CDROM: Implement auto-pause at end of track
|
2019-11-12 20:40:37 +10:00 |
|
Connor McLaughlin
|
85413218cb
|
SPU: Check upper 8 byte block of ADPCM block for interrupt
Fixes NFS2 stuck after selecting Race.
|
2019-11-12 18:56:55 +10:00 |
|
Connor McLaughlin
|
90cf6b8b41
|
CDROM: Don't lose INT1 interrupts from command execution
|
2019-11-12 18:02:36 +10:00 |
|
Connor McLaughlin
|
6a82333d8f
|
Pad: Only buffer a single byte
Fixes Croc 2 memory card access freezing.
|
2019-11-12 01:32:06 +10:00 |
|
Connor McLaughlin
|
d8452d7d7d
|
GPU: Track horizontal blanking, correct timer increment point
|
2019-11-12 01:32:06 +10:00 |
|
Connor McLaughlin
|
f3baee2582
|
DMA: Hack for self-referencing DMA loops
I need to figure how these are being generated in the first place.
|
2019-11-11 20:37:13 +10:00 |
|
Connor McLaughlin
|
29674df803
|
DMA: Simplify address masking
|
2019-11-11 20:34:41 +10:00 |
|
Connor McLaughlin
|
6f4cf7d5e3
|
System: Support changing BIOS path
|
2019-11-11 19:43:39 +10:00 |
|
Connor McLaughlin
|
99c264947d
|
SPU: Implement capture buffers
Fixes Crash Team Racing and lipsyncing within.
|
2019-11-11 14:06:30 +10:00 |
|
Connor McLaughlin
|
26437e31dd
|
SPU: Fire interrupt on DMA reads/writes too
|
2019-11-11 14:05:58 +10:00 |
|
Connor McLaughlin
|
8722757412
|
SPU: Implement pitch modulation
|
2019-11-11 00:41:09 +10:00 |
|
Connor McLaughlin
|
5a84122862
|
CDROM: Implement CDDA report
|
2019-11-10 23:03:52 +10:00 |
|
Connor McLaughlin
|
ab90d287bb
|
CDROM: Use Sub-Channel Q for GetLocP
|
2019-11-10 22:45:48 +10:00 |
|