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Author SHA1 Message Date
Connor McLaughlin d58dbe04c0 CPU: Fix load delay register reads for same register in delay slot 2019-09-15 12:16:51 +10:00
Connor McLaughlin 1bb794dd39 GPU: Use max vertex count based on buffer size 2019-09-15 01:18:58 +10:00
Connor McLaughlin a58b687352 GPU: Cap batch sizes at 1024 vertices, flush if exceeded 2019-09-15 01:13:23 +10:00
Connor McLaughlin 4ca3b4b570 CPU: Fix alignment exception on register indirect branch 2019-09-15 01:13:11 +10:00
Connor McLaughlin bea727bbe4 CPU: Fix BGEZAL with rs == ra 2019-09-15 01:02:35 +10:00
Connor McLaughlin 273f010d17 GPU: Use degenerate triangles to split strips and batch them 2019-09-15 00:17:43 +10:00
Connor McLaughlin 1c8e326624 GPU: Fix off-by-one in rectangle rendering 2019-09-14 23:50:34 +10:00
Connor McLaughlin 77b15d156d System: Periodically flush GPU 
Needs real timings...
 2019-09-14 23:50:24 +10:00
Connor McLaughlin 03bd135060 SDL: Make GL debug output less noisy in Release 2019-09-14 23:49:21 +10:00
Connor McLaughlin b5d51f47cd GPU: Use texel fetch for creating page textures 2019-09-14 23:48:32 +10:00
Connor McLaughlin 19d9322e67 GPU: Fix texture coordinates when rendering paletted textures 2019-09-14 23:05:10 +10:00
Connor McLaughlin e40393fec4 GPU: Use scissor test for drawing area 2019-09-14 21:54:58 +10:00
Connor McLaughlin 3d6b8e485e Interface: Support loading filenames on command line 2019-09-14 21:54:46 +10:00
Connor McLaughlin 363d62e5c1 GPU: Various HW renderer fixes 2019-09-14 21:34:55 +10:00
Connor McLaughlin d94d608ad7 GPU: Implment actual data copy of VRAM->CPU readbacks 2019-09-14 20:48:15 +10:00
Connor McLaughlin f6ef3f7ba6 GPU: Saving/loading of VRAM 2019-09-14 20:45:26 +10:00
Connor McLaughlin 2560efbebd Save state support 2019-09-14 20:28:47 +10:00
Connor McLaughlin 851ef67814 GPU: Implement fill VRAM command 2019-09-14 16:43:53 +10:00
Connor McLaughlin 46870c6a7a GPU: Implement basic rectangle rendering 2019-09-14 16:27:24 +10:00
Connor McLaughlin f47d44c151 CPU: Implement break instruction 2019-09-14 14:41:41 +10:00
Connor McLaughlin 32a36ef1bc CPU: Implement alignment (memory) exception 2019-09-14 14:29:23 +10:00
Connor McLaughlin 0726095f00 CPU: Implement fixed dcache/scratchpad 2019-09-14 14:18:42 +10:00
Connor McLaughlin ced3038e73 CPU: Implement sub instruction 2019-09-14 13:39:36 +10:00
Connor McLaughlin 1afa02d475 CPU: Fix overflowed register written back in add instruction 2019-09-14 13:33:29 +10:00
Connor McLaughlin 459db392e7 CPU: Add missing cop0 register reads 2019-09-14 13:31:44 +10:00
Connor McLaughlin 9f36384752 System: Support sideloading EXE files via BIOS patch 2019-09-14 13:22:34 +10:00
Connor McLaughlin ae43cc838b GPU: Partially implemented texture support 2019-09-14 02:07:31 +10:00
Connor McLaughlin cfe361c1a6 GPU: Basic/hacky CPU->VRAM transfers 2019-09-13 01:10:08 +10:00
Connor McLaughlin 52b619facc DMA: Implement block transfers 2019-09-13 01:09:44 +10:00
Connor McLaughlin aea7a18ac2 GPU: More work on OpenGL renderer 2019-09-13 01:09:07 +10:00
Connor McLaughlin 4706a906d5 GPU: Base work for hardware renderer 2019-09-12 12:53:04 +10:00
Connor McLaughlin c0853de6a6 GPU: Partial render polygon command processing 2019-09-11 16:04:31 +10:00
Connor McLaughlin 162f94337e DMA: Implement linked list mode 2019-09-11 15:02:22 +10:00
Connor McLaughlin 27913cd20a Partial implementation of DMA controller and GPU stubs 2019-09-11 14:01:19 +10:00
Connor McLaughlin 2149ab4d69 Initial commit 2019-09-11 14:00:42 +10:00